C8051F572-IMR Silicon Labs, C8051F572-IMR Datasheet - Page 22
C8051F572-IMR
Manufacturer Part Number
C8051F572-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F556-IMR.pdf
(302 pages)
Specifications of C8051F572-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 22 of 302
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C8051F55x/56x/57x
3. Pin Definitions
22
VREGIN
GNDA
Name
VDDA
C2CK
P4.0/
P3.0/
P2.1/
GND
RST/
VDD
C2D
C2D
C2D
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
VIO
packages
40-pin
Pin
10
40
39
38
37
36
35
4
6
5
7
3
2
9
8
1
Table 3.1. Pin Definitions for the C8051F55x/56x/57x
packages
32-pin
Pin
10
32
31
30
29
28
27
—
—
4
6
5
7
3
2
9
8
1
packages
24-pin
Pin
24
23
22
21
20
19
18
—
—
—
3
4
5
2
1
8
7
6
D I/O or A In
D I/O or A In
D I/O or A In
D I/O or A In Port 0.0. See SFR Definition 19.12.
D I/O or A In Port 0.1
D I/O or A In Port 0.2
D I/O or A In Port 0.3
D I/O or A In Port 0.4
D I/O or A In Port 0.5
D I/O or A In Port 0.6
D I/O or A In Port 0.7
Rev. 1.1
D I/O
D I/O
D I/O
D I/O
D I/O
Type
Digital Supply Voltage. Must be connected.
Digital Ground. Must be connected.
Analog Supply Voltage. Must be connected.
Analog Ground. Must be connected.
Voltage Regulator Input
Port I/O Supply Voltage. Must be connected.
Device Reset. Open-drain output of internal
POR or V
Clock signal for the C2 Debug Interface.
Port 4.0. See SFR Definition 19.28.
Bi-directional data signal for the C2 Debug
Interface.
Port 3.0. See SFR Definition 19.24.
Bi-directional data signal for the C2 Debug
Interface.
Port 2.1. See SFR Definition 19.20.
Bi-directional data signal for the C2 Debug
Interface.
DD
Monitor.
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