IS61C1024AL-12JI-TR ISSI, IS61C1024AL-12JI-TR Datasheet - Page 8

• Manufacturer Part Number: IS61C1024AL-12JI-TR
• Description: SRAM 1Mb 128Kx8 12ns 5v
• Manufacturer: ISSI
• Type: Asynchronousr

Specifications of IS61C1024AL-12JI-TR

• Product Category: SRAM
• Memory Size: 1 Mbit
• Organization: 128 K x 8
• Access Time: 12 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Current: 40 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: SOJ-32
• Interface: TTL
• Factory Pack Quantity: 1000

IS61C1024AL, IS64C1024AL
8
AC WAVEFORMS
WRITE CYCLE NO. 1
WRITE CYCLE NO. 2
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
2. I/O will assume the High-Z state if OE = V
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to
the rising or falling edge of the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
CE1
CE2
OUT
WE
CE1
CE2
D
OE
OUT
WE
D
IN
IN
LOW
HIGH
t
SA
(CE1 Controlled, OE is HIGH or LOW)
(OE is HIGH During Write Cycle)
DATA UNDEFINED
DATA UNDEFINED
t
SA
Ih
.
Integrated Silicon Solution, Inc. — www.issi.com —
VALID ADDRESS
t
t
AW
t
HZWE
HZWE
t
VALID ADDRESS
t
AW
t
t
t
PWE1
WC
PWE1
PWE2
t
t
t
SCE1
SCE2
WC
(1,2)
HIGH-Z
HIGH-Z
(1 )
t
t
SD
DATA
SD
DATA
IN
IN
VALID
VALID
t
t
HD
t
HD
t
LZWE
LZWE
t
t
HA
HA
CE2_WR2.eps
CE2_WR1.eps
1-800-379-4774
05/09/2012
Rev. D