70V3319S133BF IDT, 70V3319S133BF Datasheet - Page 2

• Manufacturer Part Number: 70V3319S133BF
• Description: SRAM 256Kx18 STD-PWR 3.3V SYNC DUAL-PORT RAM
• Manufacturer: IDT

Specifications of 70V3319S133BF

• Part # Aliases: IDT70V3319S133BF

NOTES:
1. A
2. All V
3. All V
4. All V
5. Package body is approximately 15mm x 15mm x 1.4mm with 0.8mm ball pitch.
6. This package code is used to reference the package diagram.
7. This text does not indicate orientation of the actual part-marking.
Description:
Dual-Port RAM. The memory array utilizes Dual-Port memory cells to
allow simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide minimal setup and hold
times. The timing latitude provided by this approach allows systems
to be designed with very short cycle times. With an input data register, the
IDT70V3319/99 has been optimized for applications having unidirectional
Pin Configuration
IDT70V3319/99S
High-Speed 3.3V 256/128K x 18 Dual-Port Synchronous Static RAM
set to V
The IDT70V3319/99 is a high-speed 256/128K x 18 bit synchronous
17
is a NC for IDT70V3399.
DDQ
DD
SS
IL
pins must be connected to ground supply.
pins must be connected to 3.3V power supply.
pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to V
(0V).
08/01/02
I/O
I/O
1
I/O
V
V
V
V
V
I/O
NC
NC
V
NC
NC
NC
V
DDQL
NC
DDQL
DDQL
DDQL
SS
SS
DD
11L
14R
16R
9L
2
I/O
I/O
I/O
I/O
I/O
V
V
V
V
V
NC
NC
V
NC
NC
NC
NC
SS
SS
DD
SS
SS
SS
14L
11R
16L
17L
9R
(1,2,3,4,5)
PIPE/ FT
3
V
V
I/O
V
I/O
V
V
I/O
V
I/O
I/O
V
V
DDQR
NC
DDQR
DDQR
DDQR
NC
DDQR
NC
DDQL
SS
SS
15R
13R
17R
10L
12L
R
PIPE/ FT
4
I/O
I/O
I/O
TDO
I/O
TMS
TCK
V
V
V
NC
NC
TDI
NC
NC
V
SS
SS
12R
SS
10R
SS
13L
15L
L
A
A
TRST
5
A
A
NC
17R (1)
NC
17L (1)
NC
15R
15L
6
A
A
A
A
A
A
A
A
11L
11R
16L
14L
16R
13R
14R
13L
7
A
A
A
A
A
A
A
A
10R
10L
12R
9R
7L
7R
9L
12L
70V3319/99BF
208-Pin fpBGA
8
UB
UB
LB
A
NC
LB
A
NC
6.42
Top View
8L
8R
BF-208
R
L
L
R
2
or bidirectional data flow in bursts. An automatic power down feature,
controlled by CE
enter a very low standby power mode.
2.5V on one or both ports, controllable by the OPT pins. The power supply
for the core of the device (V
CE
CE
CE
CE
V
NC
V
9
NC
DD
DD
The 70V3319/99 can support an operating voltage of either 3.3V or
1L
0R
1R
0L
(6)
10
V
OE
V
V
(7)
V
V
V
OE
DD
SS
SS
SS
DD
SS
L
R
REPEAT
REPEAT
11
CLK
R/W
R/W
ADS
CLK
ADS
Industrial and Commercial Temperature Ranges
0
L
L
R
L
R
R
IH
and CE
L
R
(3.3V), and 2.5V if OPT pin for that port is
CNTEN
CNTEN
12
A
A
A
A
A
A
3R
6L
5R
6R
5L
3L
R
L
1,
DD
permits the on-chip circuitry of each port to
V
A
13
A
A
A
A
A
A
DD
0R
4L
1L
2L
4R
1R
2R
) remains at 3.3V.
I/O
14
I/O
I/O
V
V
V
V
NC
V
V
NC
NC
V
NC
V
A
V
SS
SS
SS
DD
DD
DD
SS
SS
SS
0L
1R
6L
3R
V
V
V
OPT
OPT
V
V
V
15
I/O
I/O
I/O
I/O
V
NC
NC
NC
DDQL
DDQL
DDQR
DDQL
DDQL
NC
DDQL
DD
6R
8R
3L
1L
R
L
I/O
I/O
I/O
I/O
16
I/O
I/O
V
V
V
V
V
NC
NC
NC
NC
NC
V
SS
SS
SS
SS
SS
SS
5L
4R
2R
0R
7L
8L
V
V
V
17
V
I/O
I/O
I/O
I/O
I/O
V
V
5623 drw 02c
V
NC
DDQR
NC
DDQR
DDQR
NC
NC
DDQR
NC
SS
SS
SS
5R
4L
0L
7R
2L
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U