XRT83L38ES Exar, XRT83L38ES Datasheet - Page 38
XRT83L38ES
Manufacturer Part Number
XRT83L38ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L38ES.pdf
(87 pages)
Specifications of XRT83L38ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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XRT83L38
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
Table 11
REDUNDANCY APPLICATIONS
Telecommunication system design requires signal integrity and reliability. When a T1/E1 primary line card has
a failure, it must be swapped with a backup line card while maintaining connectivity to a backplane without
losing data. System designers can achieve this by implementing common redundancy schemes with the
XRT83L38 Line Interface Unit (LIU). The XRT83L38 offers features that are tailored to redundancy applications
while reducing the number of components and providing system designers with solid reference designs. These
features allow system designers to implement redundancy applications that ensure reliability. The Internal
Impedance mode eliminates the need for external relays when using the 1:1 and 1+1 redundancy schemes.
PROGRAMMING CONSIDERATIONS
In many applications switching the control of the transmitter outputs and the receiver line impedance to
hardware control will provide faster transmitter ON/OFF switching.
100 Ω
110 Ω
120 Ω
75 Ω
T1
J1
E1
E1
summarizes the transmit terminations.
TERSEL1
0
0
0
0
0
0
1
1
1
1
1
1
TERSEL0
0
0
0
1
1
1
0
0
0
1
1
1
T
ABLE
0=
1=
T
TRATIO
ABLE
TXTSEL
EXTERNAL
INTERNAL
10: T
0
1
0
0
1
0
0
1
0
0
1
0
0
1
11: T
RANSMIT
RANSMIT
TRATIO
35
T
0
1
x
0
1
x
0
1
x
0
1
x
ERMINATION
T
ERMINATIONS
T
CONTROL
URNS
13.75 Ω
SET BY
R
12.5 Ω
9.4 Ω
15 Ω
BITS
1:2.45
int
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
0 Ω
1:2
C
Ω
R
ONTROL
ATIO
n, R
2.45
2.45
2.45
2.45
ext
n
2
2
2
2
2
2
2
2
,
AND
SETTINGS
C
ext ARE SUGGESTED
R
3.1 Ω
3.1 Ω
3.1 Ω
3.1 Ω
6.2 Ω
9.1 Ω
6.2 Ω
9.1 Ω
ext
0 Ω
0 Ω
0 Ω
0 Ω
Ω
REV. 1.0.2
0.68 μ F
0.68 μ F
0.68 μ F
0.68 μ F
C
0
0
0
0
0
0
0
0
ext
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