XRT83L314ES Exar, XRT83L314ES Datasheet - Page 64

• Manufacturer Part Number: XRT83L314ES
• Description: LIN Transceivers
• Manufacturer: Exar

Specifications of XRT83L314ES

• Product Category: LIN Transceivers
• Rohs: yes

XRT83L314
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
N
OTE
B
B
D4
D3
D2
D1
D0
: Any change in status will generate an interrupt (if enabled in channel register 0x04h and GIE is set to "1" in the
D7
D6
D5
D4
D3
D2
D1
D0
IT
IT
global register 0xE0h). The status registers are reset upon read (RUR).
LCV/OFIS
Reserved
QRPDIS
FLSDET
NLCDIS
RLOSIS
AISDIS
CLOS5
CLOS4
CLOS3
CLOS2
CLOS1
CLOS0
N
N
AME
AME
T
T
ABLE
ABLE
Line Code Violation / Counter Overflow Status
0 = No change
1 = Change in status occurred
Network Loop Code Detection Status
0 = No change
1 = Change in status occurred
Alarm Indication Signal Status
0 = No change
1 = Change in status occurred
Receiver Loss of Signal Status
0 = No change
1 = Change in status occurred
Quasi Random Pattern Detection Status
0 = No change
1 = Change in status occurred
FIFO LIMIT STATUS DETECT
The FLSDET is used to determine whether the receiver or trans-
mitter FIFO has reached its limit status. If both FIFOs reach their
limit capacity, this bit will be set to "1".
0 = Receive JA
1 = Transmit JA
Cable Loss Indication
This 6-Bit binary word indicates the cable attenuation on the
receiver inputs RTIP/RRING within ±1dB with Bit 5 being the MSB.
This Register Bit is Not Used
31: M
32: M
ICROPROCESSOR
ICROPROCESSOR
C
C
HANNEL
HANNEL
0-13 (0
0-13 (0
F
F
UNCTION
UNCTION
R
R
60
EGISTER
EGISTER
X
X
06
07
H
H
-0
-0
0
X
0
X
D6
D7
X
X
06
07
H
H
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
Type
RUR
RUR
RUR
RUR
RUR
Type
R/W
RO
RO
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
0
0
0
0