E981.03A38HB ELMOS Semiconductor, E981.03A38HB Datasheet - Page 42

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E981.03A38HB

Manufacturer Part Number
E981.03A38HB
Description
Interface - Specialized KNX/EIB transceiver
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E981.03A38HB

Rohs
yes
Product Type
KNX/EIB Transceiver
Operating Supply Voltage
3.3 V
Supply Current
10 mA
Maximum Power Dissipation
1 W
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Table 42. Status of the transmit telegram buffer
1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard or soft reset
Table 43. Length of the frame in the transmit buffer (bit 8)
1) Access via UART service and SPI possible. If a frame is uploaded by SPI the host controller have to set the LEN bits. In case of hard
Table 44. Length of the frame in the transmit buffer (bits 7 ... 0)
1) Access via UART service and SPI possible. If a frame is uploaded by SPI the host controller have to set the LEN bits. In case of hard
Table 45. Acknowledge state register
Table 46. Acknowledge information from host
1) Access via UART service and SPI possible. If a frame is uploaded by SPI the host controller have to set the LEN bits. In case of hard
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
KNX_TR_BUF_
STAT
content
hard reset value
soft reset value
access
bit description
KNX_TX_LEN1
content
hard reset value
soft reset value
access
KNX_TX_LEN0
content
hard reset value
soft reset value
access
Register Name
ACK_HOST
ACK_KNXIC
ACK_HOST
content
hard reset value
soft reset value
external access
bit description
or soft reset the register is reset to the hard reset value or soft reset value respectively.
or soft reset the register is reset to the hard reset value or soft reset value respectively.
reset the register is reset to the hard reset value.
KNX/ EIB TRANSCEIVER
PRODUCTION DATA - JUL 2, 2012
ELMOS Semiconductor AG
the register is reset to the hard reset value or soft reset value respectively.
MSB
-
0
-
R
READY :
"1": the RAM buffer is ready for transmission
"0": the RAM buffer is not yet ready for transmission
The bit is set by either the host processor or internal logic and reset after successful trans-
mission. A manual write is only necessary if the frame is uploaded by SPI
MSB
-
0
-
R
MSB
LEN7
0
0
R/W
MSB
-
0
-
R
RX_ACK:„1": acknowledge information from host for frame currently received
NACK : not acknowledge flag
BUSY : busy flag
ADR : addressed flag
all flags are reset by the E981.03 at the beginning of a received frame.
Address
0x21A
0x3E9
"0": no acknowledge information from host for frame currently received
Bit is set by host access via SPI or UART and reset by internal logic at
start of a frame on KNX line.
1)
-
0
-
R
-
0
-
R
LEN6
0
0
R/W
-
0
-
R
Description
acknowledge information from host
acknowledge information from E981.03
1)
-
0
-
R
-
0
-
R
LEN5
0
0
R/W
-
0
-
R
1)
Data Sheet
42/51
-
0
-
R
-
0
-
R
LEN4
0
0
R/W
-
0
-
R
1)
-
0
-
R
-
0
-
R
LEN3
0
0
R/W
RX_ACK
0
-
R/W
1)
1)
-
0
-
R
-
0
-
R
LEN2
0
0
R/W
NACK
0
-
R/W
back to
back to
back to
back to
1)
1)
QM-No.: 25DS0046E.01
-
0
-
R
-
0
-
R
LEN1
0
0
R/W
BUSY
0
-
R/W
Table 8 Register Table
Table 8 Register Table
Table 8 Register Table
Table 8 Register Table
1)
1)
E981.03
LSB
READY
0
0
R/W
LSB
LEN8
0
0
R/W
LSB
LEN0
0
0
R/W
LSB
ADR
0
-
R/W
1)
1)
1)
1)

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