C8051F303-GSR Silicon Labs, C8051F303-GSR Datasheet - Page 79
C8051F303-GSR
Manufacturer Part Number
C8051F303-GSR
Description
8-bit Microcontrollers - MCU 8KB 14Pin MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051F301-GSR.pdf
(178 pages)
Specifications of C8051F303-GSR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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Bit7:
Bits6–4: IN1SL2–0: /INT1 Port Pin Selection Bits
Bit3:
Bits2–0: INT0SL2–0: /INT0 Port Pin Selection Bits
Note: Refer to SFR Definition 15.1 for INT0/1 edge- or level-sensitive interrupt selection.
IN1PL
R/W
Bit7
IN1PL: /INT1 Polarity
0: /INT1 input is active low.
1: /INT1 input is active high.
These bits select which Port pin is assigned to /INT1. Note that this pin assignment is inde-
pendent of the Crossbar; /INT1 will monitor the assigned Port pin without disturbing the
peripheral that has been assigned the Port pin via the Crossbar. The Crossbar will not
assign the Port pin to a peripheral if it is configured to skip the selected pin (accomplished by
setting to ‘1’ the corresponding bit in register XBR0).
IN0PL: /INT0 Polarity
0: /INT0 interrupt is active low.
1: /INT0 interrupt is active high.
These bits select which Port pin is assigned to /INT0. Note that this pin assignment is inde-
pendent of the Crossbar. /INT0 will monitor the assigned Port pin without disturbing the
peripheral that has been assigned the Port pin via the Crossbar. The Crossbar will not
assign the Port pin to a peripheral if it is configured to skip the selected pin (accomplished by
setting to ‘1’ the corresponding bit in register XBR0).
IN1SL2–0
IN0SL2–0
IN1SL2
R/W
Bit6
000
001
010
100
101
000
001
010
100
101
011
110
111
011
110
111
SFR Definition 8.11.
IN1SL1
R/W
Bit5
/INT1 Port Pin
/INT0 Port Pin
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
IN1SL0
R/W
Bit4
IT01CF: INT0/INT1 Configuration
Rev. 2.9
IN0PL
R/W
Bit3
IN0SL2
R/W
Bit2
C8051F300/1/2/3/4/5
IN0SL1
R/W
Bit1
IN0SL0
R/W
Bit0
SFR Address:
00000001
Reset Value
0xE4
79
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