C8051F996-GUR Silicon Labs, C8051F996-GUR Datasheet - Page 196
C8051F996-GUR
Manufacturer Part Number
C8051F996-GUR
Description
8-bit Microcontrollers - MCU 8kB ADC 14-CH CDC
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F996-GUR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F99x-C8051F98x
20.1. SmaRTClock Interface
The SmaRTClock Interface consists of three registers: RTC0KEY, RTC0ADR, and RTC0DAT. These inter-
face registers are located on the CIP-51’s SFR map and provide access to the SmaRTClock internal regis-
ters listed in Table 20.1. The SmaRTClock internal registers can only be accessed indirectly through the
SmaRTClock Interface.
Table 20.1. SmaRTClock Internal Registers
20.1.1. SmaRTClock Lock and Key Functions
The SmaRTClock Interface has an RTC0KEY register for legacy reasons, however, all writes to this regis-
ter are ignored. The SmaRTClock interface is always unlocked on C8051F99x-C8051F98x.
196
SmaRTClock
0x08–0x0B
0x00–0x03
Address
0x04
0x05
0x06
SmaRTClock
CAPTUREn SmaRTClock Capture
RTC0XCN
RTC0XCF
Register
RTC0CN
ALARMn
Registers
SmaRTClock Control
Register
SmaRTClock Oscillator
Control Register
SmaRTClock Oscillator
Configuration Register
SmaRTClock Alarm
Registers
Register Name
Rev. 1.1
Four Registers used for setting the 32-bit
SmaRTClock timer or reading its current value.
Controls the operation of the SmaRTClock State
Machine.
Controls the operation of the SmaRTClock
Oscillator.
Controls the value of the progammable
oscillator load capacitance and
enables/disables AutoStep.
Four registers used for setting or reading the
32-bit SmaRTClock alarm value.
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