C8051F996-GUR Silicon Labs, C8051F996-GUR Datasheet - Page 123
C8051F996-GUR
Manufacturer Part Number
C8051F996-GUR
Description
8-bit Microcontrollers - MCU 8kB ADC 14-CH CDC
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F996-GUR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F99x-C8051F98x
Notes on Registers, Operands and Addressing Modes:
Rn—Register R0–R7 of the currently selected register bank.
@Ri—Data RAM location addressed indirectly through R0 or R1.
rel—8-bit, signed (twos complement) offset relative to the first byte of the following instruction. Used by
SJMP and all conditional jumps.
direct—8-bit internal data location’s address. This could be a direct-access Data RAM location
(0x00–0x7F) or an SFR (0x80–0xFF).
#data—8-bit constant
#data16—16-bit constant
bit—Direct-accessed bit in Data RAM or SFR
addr11—11-bit destination address used by ACALL and AJMP. The destination must be within the
same 2 kB page of program memory as the first byte of the following instruction.
addr16—16-bit destination address used by LCALL and LJMP. The destination may be anywhere within
the 8 kB program memory space.
There is one unused opcode (0xA5) that performs the same function as NOP.
All mnemonics copyrighted © Intel Corporation 1980.
Rev. 1.1
123
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