PCA9539APW,118 NXP Semiconductors, PCA9539APW,118 Datasheet - Page 8

• Manufacturer Part Number: PCA9539APW,118
• Description: Interface - I/O Expanders 16bit I2C IO Port
• Manufacturer: NXP Semiconductors

Specifications of PCA9539APW,118

• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-24
• Operating Current: 160 mA
• Output Current: 25 mA
• Power Dissipation: 200 mW
• Product Type: I/O Expanders

NXP Semiconductors
PCA9539A
Product data sheet
6.3 I/O port
6.4 Power-on reset
Table 12.
When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a
high-impedance input. The input voltage may be raised above V
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the
Output port register. In this case, there are low-impedance paths between the I/O pin and
either V
recommended levels for proper operation.
When power (from 0 V) is applied to V
in a reset condition until V
released and the PCA9539A registers and I
their default states. After that, V
operating voltage for a power-reset cycle. See
Bit
Symbol
Default
Fig 6. Simplified schematic of the I/Os (P0_0 to P0_7, P1_0 to P1_7)
configuration
write polarity
shift register
shift register
shift register
write pulse
read pulse
data from
data from
data from
pulse
pulse
DD
write
At power-on reset, all registers return to default values.
Configuration port 1 register (address 07h)
or V
C1.7
7
1
configuration
register
SS
D
CK
All information provided in this document is subject to legal disclaimers.
. The external voltage applied to this I/O pin should not exceed the
FF
Q
Q
Rev. 1 — 26 September 2012
C1.6
6
1
DD
Low voltage 16-bit I
has reached V
output port
register
D
CK
DD
FF
C1.5
5
1
must be lowered to below V
Q
DD
, an internal power-on reset holds the PCA9539A
input port
register
polarity
inversion
register
C1.4
D
CK
D
CK
POR
2
4
1
FF
FF
C-bus/SMBus state machine initializes to
Section 8.2 “Power-on reset
. At that time, the reset condition is
2
Q
Q
C-bus I/O port with interrupt and reset
C1.3
3
1
Q1
Q2
C1.2
PORF
DD
2
1
to a maximum of 5.5 V.
PCA9539A
and back up to the
ESD
protection
diode
© NXP B.V. 2012. All rights reserved.
C1.1
1
1
requirements”.
output port
register data
V
P0_0 to P0_7
P1_0 to P1_7
V
input port
register data
to INT
polarity
inversion
register data
DD
SS
002aah246
C1.0
0
1
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