92HD90B0X5NLGXYAX IDT, 92HD90B0X5NLGXYAX Datasheet - Page 282

• Manufacturer Part Number: 92HD90B0X5NLGXYAX
• Description: Interface - CODECs
• Manufacturer: IDT

Specifications of 92HD90B0X5NLGXYAX

• Rohs: yes
• Part # Aliases: IDT92HD90B0X5NLGXYAX

92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
verb F7F/77F
verb F80/780
verb F81/781
Register Address
Register Address
Register Address
7.29.1.6. RESET Register
7.29.1.7. STATUS Register
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will cause reset on all silicon revisions
7.29.1.8. INIT Register
Prior to WC revision, this register reset by POR/DAFG/ULR. WC revision, reset by POR only. Writing
to NID22h verb 77F will cause reset on all silicon revisions
7:0
7
6
5:3
2
1
0
7:4
3
2:1
0
Bit
Bit
Bit
RESET
limit1latch
limit0latch
Reserved
limit1
limit0
zerodet_flag
Reserved
anabeep_dcbyp
anabeep_dc_coef
f
Initialize
Label
Label
Label
RW
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
Type Default
Type Default
Type
0
0
0
0x0
0
0
0
0
0
0x2
0
Default
282
Writing causes registers to revert to their default values (similar
to a function group reset)
Latched version of limit1, clear via GAINCTRL_LO[7]
Latched version of limit0, clear via GAINCTRL_LO[7]
RESERVED
Set (1) if regz saturation after gain multiply for CH1. may
change on a sample by sample basis.
Set (1) if regz saturation after gain multiply for CH0. may
change on a sample by sample basis.
Set when input zero detect of long string of zeroes.
RESERVED
1 = bypass analog Beep DC filter
0: dc_coef = 24’h004000;
1: dc_coef = 24’h001000;
2: dc_coef = 24’h000400;
3: dc_coef = 24’h000100;
1= Initialize/soft reset data path. Must be set when changing
the config0 or config1 registers.
Description
Description
Description
V 1.2 3/12
92HD98