GLS85LP1008B-M-C-LFTE (rev. CB1) Greenliant, GLS85LP1008B-M-C-LFTE (rev. CB1) Datasheet - Page 3

• Manufacturer Part Number: GLS85LP1008B-M-C-LFTE (rev. CB1)
• Description: Flash 8G MLC, NAND MLC 3.3V Comm
• Manufacturer: Greenliant

Specifications of GLS85LP1008B-M-C-LFTE (rev. CB1)

• Product Category: Flash
• Rohs: yes

8 GByte NANDrive
GLS85LP1008B
General Description
©2010 Greenliant Systems, Ltd.
Performance-optimized NANDrive
Microcontroller Unit (MCU)
Power Management Unit (PMU)
SRAM Buffer
Embedded Flash File System
Serial Communication Interface (SCI)
Multi-tasking Interface
Each NANDrive contains an integrated NAND Controller and NAND Flash dies in a LBGA pack-
age. Refer to Figure 1 for the NANDrive block diagram.
The heart of the NANDrive is the NAND Controller which translates standard ATA signals into flash
media data and control signals. The following components contribute to the NANDrive’s operation.
The 32-bit RISC architecture transfers the ATA/IDE commands into data and control signals
required for flash media operation.
The power management unit controls the power consumption of the NANDrive. The PMU dramat-
ically reduces the power consumption of the NANDrive by putting the part of the circuitry that is not
in operation into sleep mode.
The Flash File System handles inadvertent power interrupts and has auto-recovery capability to
insure NANDrive data integrity. For regular power management, the Host must send an
Idle_Immediate command and wait for command ready before powering down the NANDrive.
A contributor to the NANDrive performance is an SRAM buffer. The buffer optimizes the host’s
data transfer to and from the flash media.
The embedded flash file system is an integral part of the NANDrive. It contains MCU firmware that
performs the following tasks:
The Serial Communication Interface (SCI) is designed for manufacturing error reporting. During
the design process, always provide access to the SCI interface in the PCB design to aid in design
validation.
The multi-tasking interface enables fast, sustained write performance by allowing concurrent
Read, Program, and Erase operations to multiple flash media devices.
1. Translates host side signals into flash media writes and reads.
2. Provides flash media wear leveling to spread the flash writes across all memory
3. Keeps track of data file structures.
4. Stores the data in Flash media upon completion of a Write command. The NANDrive
address space to increase the longevity of flash media.
does not do Post-Write operations, except for when the write cache is enabled by the
Host command.
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Advance Information
S71421-02-000
05/10