IS25LD020-JVLE-TR ISSI, IS25LD020-JVLE-TR Datasheet - Page 26

• Manufacturer Part Number: IS25LD020-JVLE-TR
• Description: Flash 2M 2.3-3.6V 100Mhz Serial Flash
• Manufacturer: ISSI

Specifications of IS25LD020-JVLE-TR

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 2 Mbit
• Architecture: Uniform
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Maximum Operating Current: 15 mA
• Operating Temperature: - 40 C to + 105 C
• Mounting Style: SMD/SMT
• Package / Case: VVSOP-8
• Organization: 256 K x 8

POWER-UP AND POWER-DOWN
At Power-up and Power-down, the device must not be
selected (CE# must follow the voltage applied on Vcc)
until Vcc reaches the correct value:
- Vcc(min) at Power-up, and then for a further delay of
tVCE
- Vss at Power-down
Usually a simple pull-up resistor on CE# can be used to
insure safe and proper Power-up and Power-down.
To avoid data corruption and inadvertent write operations
during power up, a Power On Reset (POR) circuit is included.
The logic inside the device is held reset while Vcc is less than
the POR threshold value (Vwi) during power up, the device
does not respond to any instruction until a time delay of
tPUW has elapsed after the moment that Vcc rised above the
VWI threshold. However, the correct operation of the device
Integrated Silicon Solution, Inc.- www.issi.com
Rev. D
2/12/2013
V (write inhibit)
Note : *1. These parameters are characterized only.
Vcc(max)
Vcc(min)
Symbol
t
t
PUW
V
VCE
WI
*1
*1
*1
Vcc
Vcc(min) to CE# Low
Power-Up time delay to Write instruction
Write Inhibit Voltage
Reset State
Chip Selection Not Allowed
Parameter
All Write Commands are Rejected
is not guaranteed if, by this time, Vcc is still below Vcc(min).
No Write Status Register, Program or Erase instructions
should be sent until the later of:
- tPUW after Vcc passed the VWI threshold
- tVCE after Vcc passed the Vcc(min) level
At Power-up, the device is in the following state:
- The device is in the Standby mode
- The Write Enable Latch (WEL) bit is reset
At Power-down, when Vcc drops from the operating
voltage, to below the Vwi, all write operations are disabled
and the device does not respond to any write
instruction.
tVCE
tPUW
Read Access Allowed
Min.
1.6
10
1
IS25CD512/010
Max.
1.8
2.1
10
Device fully accessible
IS25LD020
Unit
ms
us
V
Time
26