IS25LD020-JVLE-TR ISSI, IS25LD020-JVLE-TR Datasheet
IS25LD020-JVLE-TR
Specifications of IS25LD020-JVLE-TR
Related parts for IS25LD020-JVLE-TR
IS25LD020-JVLE-TR Summary of contents
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... The dual-output fast read operation provides and effective serial data rate of 200MHz. The devices support page program mode, where 1 to 256 bytes data can be programmed into the memory in one program operation. These devices are divided into uniform 4 KByte sectors or uniform 32 KByte blocks.(IS25LD020 is uniform 4 KByte sectors or uniform 64 KByte). ...
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... Hold: Pause serial communication by the master device without resetting the serial sequence. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 Vcc CE HOLD# 3 WP# SCK 4 GND SIO 8-pin WSON CE# Vcc HOLD# SO SCK SIO WP# GND IS25CD512/010 IS25LD020 Vcc 8 7 HOLD# 6 SCK SIO 5 Vcc HOLD# SCK SIO 8-Pin USON 2 ...
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... BLOCK DIAGRAM SIO Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 3 ...
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... SPI MODES DESCRIPTION Multiple IS25CD512/010 and IS25LD020 devices can be connected on the SPI serial bus and controlled by a SPI Master, i.e. microcontroller, as shown in Figure 1. The devices support either of two SPI modes: Mode 0 (0, 0) Mode 3 (1, 1) Figure 1. Connection Diagram among SPI Master and SPI Slaves (Memory Devices) ...
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... SYSTEM CONFIGURATION The IS25CD512/010 and IS25LD020 devices are designed to interface directly with the synchronous Serial Peripheral Interface (SPI) of the Motorola MC68HCxx series of microcontrollers or any SPI interface-equipped system controllers. The devices have two superset features that can be enabled through specific software instructions and the Configuration ...
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... BP0) become read-only, and a WRSR instruction will be ignored. If the SRWD is set to “1” and WP# is pulled high (VIH), the Status Register can be changed by a WRSR instruction. Bit 6 Bit 5 Bit 4 Bit 3 Reserved BP2 BP1 IS25CD512/010 IS25LD020 Bit 2 Bit 1 Bit 0 BP0 WEL WIP ...
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... Status Register Write Disable: (See Table 9 for details) Bit 7 SRWD "0" indicates the Status Register is not write-protected (default) "1" indicates the Status Register is write-protected Table 8. Block Write Protect Bits for IS25CD512/010 and IS25LD020 Status Register Bits BP1 BP0 IS25CD512A ...
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... REGISTERS (CONTINUED) PROTECTION MODE The IS25CD512/010 and IS25LD020 have two types of write- protection mechanisms: hardware and software. These are used to prevent irrelevant operation in a possibly noisy environment and protect the data integrity. HARDWARE WRITE-PROTECTION The devices provide two hardware write-protection features: a ...
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... DEVICE OPERATION The IS25CD512/010 and IS25LD020 utilize an 8-bit instruction register. Refer to Table 10 Instruction Set for details of the Instructions and Instruction Codes. All instructions, addresses, and data are shifted in with the most significant bit (MSB) first on Serial Data Input (SI). The input data latched on the rising edge of Serial Clock (SCK) ...
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... Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 Table 11. Product Identification Product Identification Manufacturer ID Device ID: IS25CD512 IS25CD010 IS25LD020 Device ID1 Device ID1 IS25CD512/010 IS25LD020 Data First Byte 9Dh Second Byte 7Fh Device ID 1 Device ID 2 05h 20h 10h 21h 11h 22h ...
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... Rev. D 2/12/2013 followed by the first Manufacturer ID (9Dh) and the Device ID (22h, in the case of the IS25LD020), each bit shifted out during the falling edge of SCK. If CE# stays low after the last bit of the Device ID is shifted out, the Manufacturer ID and Device ID will loop until CE# is pulled high. ...
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... Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 the IS25LD020), and is shifted out on SO with the MSB first, each bit shifted out during the falling edge of SCK. If CE# stays low after the last bit of the Device ID is shifted out, the Manufacturer ID and Device ID will loop until CE# is pulled high ...
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... ADDRESS will output the 1st manufacture ID (9Dh) first -> device ID1 -> 2nd manufacture ID (7Fh) ADDRESS will output the device ID1 -> 1st manufacture ID (9D) -> 2nd manufacture ID (7Fh) Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 13 ...
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... The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit of the IS25CD512/010 and IS25LD020 is reset to the write – protected state after power-up. The WEL bit must be write enabled before any write operation, including sector, block Figure 6 ...
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... WIP bit of Status Register. the user to enable or disable the block protection and status register write protection features by writing “0”s or “1” s into the volatile BP2, BP1, BP0 and SRWD bits. IS25LD020 15 ...
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... DEVICE OPERATION (CONTINUED) READ COMMAND (READ DATA) OPERATION The Read Data (READ) instruction is used to read memory data of a IS25CD512/010 and IS25LD020 under normal mode running MHz. The READ instruction code is transmitted via the SlO line, followed by three address bytes (A23 - A0) of the first memory location to be read ...
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... When the highest address is reached, the address counter will roll over to the 000000h address, allowing the entire memory to be read with a single FAST_READ instruction. The FAST_READ instruction is terminated by driving CE# high (VIH). IS25LD020 17 ...
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... FRDO instruction. FRDO instruction is terminated by driving CE# high (VIH BYTE ADDRESS DATA OUT IS25CD512/010 IS25LD020 ... ... DATA OUT ...
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... Note: A program operation can alter “1”s into “0”s, but an erase operation is required to change “0”s back to “1”s. A byte cannot be reprogrammed without first erasing the whole sector or block. IS25LD020 19 ...
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... BLOCK_ER COMMAND (BLOCK ERASE) OPERATION A Block Erase (BLOCK_ER) instruction erases a 64 KByte block of the IS25LD020, and 32 KByte block of the IS25CD512C/010C. Before the execution of a BLOCK_ER instruction, the Write Enable Latch (WEL) must be set via a Write Enable (WREN) instruction. The WEL is reset automatically after the completion of a block erase operation ...
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... DEVICE OPERATION (CONTINUED) Figure 16. Sector Erase Sequence SIO Figure 17. Block Erase Sequence SIO Figure 18. Chip Erase Sequence SIO Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 21 ...
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... 2.1 mA 2.30V < V < 3.60V I = -100 µA OH IS25CD512/010 IS25LD020 IS25CD512/010 IS25LD040 105 - - 105 - 125 C 2.70 V – 3.60 V Min ...
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... Output Disable Time tEC Sector/Block/Chip Erase Time tPP Page Program Time tVCS VCC Set-up Time t Write Status Register time (flash bit) w Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 Min Typ Max Units 0 100 MHz 0 33 MHz ...
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... AC CHARACTERISTICS (CONTINUED) SERIAL INPUT/OUTPUT TIMING (1) SIO Note: 1. For SPI Mode 0 (0,0) Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 24 ...
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... PIN CAPACITANCE ( MHz 25°C ) Typ CIN 4 COUT 8 Note: These parameters are characterized but not 100% tested. OUTPUT TEST LOAD Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 Max Units INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL IS25CD512/010 IS25LD020 Conditions VIN = 0 V VOUT = ...
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... At Power-down, when Vcc drops from the operating voltage, to below the Vwi, all write operations are disabled and the device does not respond to any write instruction. All Write Commands are Rejected tVCE tPUW Parameter IS25CD512/010 IS25LD020 Read Access Allowed Device fully accessible Time Min. Max. Unit 10 us ...
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... From writing erase command to erase completion 5 From writing program command to program completion Min Unit Test Method 200,000 Cycles JEDEC Standard A117 20 Years JEDEC Standard A103 2,000 Volts JEDEC Standard A114 200 Volts JEDEC Standard A115 100 + ICC1 mA JEDEC Standard 78 IS25CD512/010 IS25LD020 27 ...
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... PACKAGE TYPE INFORMATION JN 8-Pin SOIC 150mil Broad Small Outline Integrated Circuit Package (Unit: millimeters) Note: Package dimensions are shown in mm. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 28 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JD 8-pin TSSOP Package (Unit: millimeters) Pin1 2.9 3.1 0.65 0.05 0.25 0.15 0.30 Unit : millimeters Note: Package dimensions are shown in mm. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 0.127 Detail A 0.5 0.7 IS25LD020 Detail A GAGE PLANE ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JK 8-pin Ulta-Thin Small Outline No-Lead (WSON) Package (Unit: millimeters) Note: Package dimensions are shown in mm. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 30 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JV 8-pin VVSOP Package 150mil (Unit: millimeters) Note: Package dimensions are shown in mm. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 31 ...
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... Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 32 ...
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... PACKAGE TYPE INFORMATION (CONTINUED) JU 8-pin USON Package (Unit: millimeters) Note: Package dimensions are shown in mm. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 33 ...
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... Safe Guard function is a security function for customer to protect by sector (4Kbyte). Every sector has one bit register to decide it will under safe guard protect or not. (“0”means protect and “1” means not protect by safe guard.) IS25CD512 (sector 0~sector 15), IS25CD010 (sector 0~sector 31) and IS25LD020 (sector 0~sector 63) ...
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... Program wait time follow product program timing spec. Fig c. shows the complete steps for program safe guard register. Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 A23-A0 IS25CD512/010 IS25LD020 byte st 1 byte D7-D0 ...
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... A23- SCK SI AAh A23- SCK SI 80h A23- SCK SI AAh A23- SCK SI 2Bh Fig b. Erase safe guard register Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 36 ...
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... A0h A23- SCK SI 55h A23- SCK SI 23h A23-A0 Fig c. program safe guard register Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 byte 2nd byte D7-D0 D7-D0 IS25CD512/010 IS25LD020 37 ...
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... A0 through A11 are not decoded. The remaining sectors within the same block remain in read-only mode 26h A23-A16 A15-A8 IS25CD512/010 IS25LD020 Command Maximum Cycle Frequency 4 Bytes 100 MHz 1 Byte 100 MHz A7-A0 ...
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... Sector Unlock command. The instruction code does not require an address to be specified, as only one sector can Figure e. Sector Lock Sequence Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 be enabled at a time. The remaining sectors within the same block remain in read-only mode. IS25LD020 39 ...
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... PRODUCT ORDERING INFORMATION Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 IS25LD020 40 ...
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... IS25CD010-JDLA* IS25CD010-JNLA* IS25CD512-JWLE IS25LD020-JDLE IS25LD020-JNLE IS25LD020-JKLE IS25LD020-JVLE 2Mb 100 IS25LD020-JDLA* IS25LD020-JNLA* IS25LD020-JKLA* IS25LD020-JVLA* IS25CD512-JWLE A* = A1, A2 Automotive Temperature Ranges Integrated Silicon Solution, Inc.- www.issi.com Rev. D 2/12/2013 IS25CD512/010 Package 8-pin TSSOP 8-pin SOIC 150mil 8-pin WSON (5x6mm) 8-pin USON (2x3mm) 8-pin TSSOP (Call Factory) ...