1893AFILFT IDT, 1893AFILFT Datasheet - Page 64
1893AFILFT
Manufacturer Part Number
1893AFILFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893AFLF.pdf
(136 pages)
Specifications of 1893AFILFT
Rohs
yes
Part # Aliases
ICS1893AFILFT
- Current page: 64 of 136
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8.3.2 100Base-TX Full Duplex (bit 1.14)
8.3.3 100Base-TX Half Duplex (bit 1.13)
8.3.4 10Base-T Full Duplex (bit 1.12)
8.3.5 10Base-T Half Duplex (bit 1.11)
ICS1893AF, Rev D 10/26/04
The STA reads this bit to learn if the ICS1893AF can support 100Base-TX, full-duplex operations. The
ISO/IEC specification requires that the ICS1893AF must set bit 1.14 to logic:
•
•
Bit 1.14 is a Command Override Write bit, which allows an STA to alter the default value of this bit. [See the
description of bit 16.15, the Command Override Write Enable bit, in
Control
The STA reads this bit to learn if the ICS1893AF can support 100Base-TX, half-duplex operations. The
ISO/IEC specification requires that the ICS1893AF must set bit 1.13 to logic:
•
•
This bit 1.13 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1893AF can support 10Base-T, full-duplex operations. The
ISO/IEC specification requires that the ICS1893AF must set bit 1.12 to logic:
•
•
This bit 1.12 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control
The STA reads this bit to learn if the ICS1893AF can support 10Base-T, half-duplex operations. The
ISO/IEC specification requires that the ICS1893AF must set bit 1.11 to logic:
•
•
Bit 1.11 of the ICS1893AF Status Register is a Command Override Write bit., which allows an STA to alter
the default value of this bit. [See the description of bit 16.15, the Command Override Write Enable bit, in
Section 8.11, “Register 16: Extended Control
Zero if it cannot support 100Base-TX, full-duplex operations.
One if it can support 100Base-TX, full-duplex operations. (For the ICS1893AF, the default value of bit
1.14 is logic one, in that the ICS1893AF supports 100Base-TX, full-duplex operations.)
Zero if it cannot support 100Base-TX, half-duplex operations.
One if it can support 100Base-TX, half-duplex operations. (For the ICS1893AF, the default value of bit
1.13 is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the
ICS1893AF supports 100Base-TX, half-duplex operations.)
Zero if it cannot support 10Base-T, full-duplex operations.
One if it can support 10Base-T, full-duplex operations. (For the ICS1893AF, the default value of bit 1.12
is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1893AF
supports 10Base-T, full-duplex operations.)
Zero if it cannot support 10Base-T, half-duplex operations.
One if it can support 10Base-T, half-duplex operations. (For the ICS1893AF, the default value of bit 1.11
is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1893AF
supports 10Base-T, half-duplex operations.)
ICS1893AF Data Sheet - Release
Register”.]
Register”.]
Register”.]
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
Register”.]
64
Section 8.11, “Register 16: Extended
Chapter 8 Management Register Set
Section 8.11, “Register 16:
Section 8.11, “Register 16:
October, 2004
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