1893AFILFT IDT, 1893AFILFT Datasheet - Page 126
1893AFILFT
Manufacturer Part Number
1893AFILFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893AFLF.pdf
(136 pages)
Specifications of 1893AFILFT
Rohs
yes
Part # Aliases
ICS1893AFILFT
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10.5.13 100M MII Media Independent Interface: Receive Latency
ICS1893AF, Rev D 10/26/04
TP_RX
RXCLK
RXD
Table 10-20
time periods consist of timings of signals on the following pins:
•
•
•
Figure 10-14
Table 10-20. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 10-14. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram
Period
†
unscrambled.
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Shown
t1
ICS1893AF Data Sheet - Release
†
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
shows the timing diagram for the time periods.
Parameter
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
126
t1
Conditions
Chapter 10 DC and AC Operating Conditions
Min. Typ. Max.
–
16
17
October, 2004
Bit times
Units
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