1893BKLFT IDT, 1893BKLFT Datasheet - Page 116
1893BKLFT
Manufacturer Part Number
1893BKLFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893BKLF.pdf
(133 pages)
Specifications of 1893BKLFT
Rohs
yes
Part # Aliases
ICS1893BKLFT
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9.5.7 MII Management Interface Timing
ICS1893BF, Rev. F, 5/13/10
Table 9-14
timings of signals on the MDC and MDIO pins).
Table 9-14. MII Management Interface Timing
† The ICS1893BF is tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board loading
Figure 9-8. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
of MDC.
Time
t1
t2
t3
t4
t5
t6
ICS1893BF Data Sheet - Release
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
Parameter
t3
t2
t5
Copyright © 2009, IDT, Inc.
All rights reserved.
t4
t6
116
Figure 9-8
shows the timing diagram for the time periods.
Conditions
Chapter 9 DC and AC Operating Conditions
–
–
–
–
–
–
400†
Min.
160
160
10
10
0
Typ.
–
–
†
–
–
–
Max.
300
–
–
–
–
–
May, 2010
Units
ns
ns
ns
ns
ns
ns
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