LFE3-95EA-7LFN484C Lattice, LFE3-95EA-7LFN484C Datasheet - Page 90

• Manufacturer Part Number: LFE3-95EA-7LFN484C
• Description: FPGA - Field Programmable Gate Array 92K LUTs 133 I/O 1.2V -7 SPEED
• Manufacturer: Lattice

Specifications of LFE3-95EA-7LFN484C

• Rohs: yes
• Number Of Gates: 92 K
• Number Of Logic Blocks: 240
• Embedded Block Ram - Ebr: 4420 Kbit
• Number Of I/os: 133
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: FPBGA-484
• Distributed Ram: 188 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 137.3 mA
• Factory Pack Quantity: 60

Table 3-7. Channel Output Jitter
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Note: Values are measured with PRBS 2
reference clock @ 10X mode.
Description
3.125 Gbps
3.125 Gbps
3.125 Gbps
2.5Gbps
2.5Gbps
2.5Gbps
1.25 Gbps
1.25 Gbps
1.25 Gbps
622 Mbps
622 Mbps
622 Mbps
250 Mbps
250 Mbps
250 Mbps
150 Mbps
150 Mbps
150 Mbps
Frequency
7
-1, all channels operating, FPGA logic active, I/Os around SERDES pins quiet,
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-37
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
Max.
0.17
0.35
0.20
0.22
0.10
0.10
0.10
0.25
0.17
0.35
0.10
0.24
0.20
0.24
0.18
0.24
0.18
0.24
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
Units