M95M01-DFDW6TP STMicroelectronics, M95M01-DFDW6TP Datasheet - Page 28

• Manufacturer Part Number: M95M01-DFDW6TP
• Description: EEPROM 1Mb SPI bus EEPROM 256kB 16MHz
• Manufacturer: STMicroelectronics

Specifications of M95M01-DFDW6TP

• Rohs: yes

Instructions
6.9
Figure 17. Read Lock Status sequence
28/45
S
C
D
Q
Read Lock Status (available only in M95M01-Ddevices)
The Read Lock Status instruction (see
Page is locked or not in Read-only mode. The Read Lock Status sequence is defined with
the Chip Select (S) first driven low. The bits of the instruction byte and address bytes are
then shifted in on Serial Data Input (D). Address bit A10 must be 1, all other address bits are
Don't Care. The Lock bit is the LSB (least significant bit) of the byte read on Serial Data
Output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip
Select (S) continues to be driven low, the same data byte is shifted out. The read cycle is
terminated by driving Chip Select (S) high.
The instruction sequence is shown in
0
1
High impedance
2
Instruction
3
4
5
6
7
MSB
23 22 21
8
Doc ID 13264 Rev 11
9 10
24-bit address
Figure
Table
3
28 29 30 31 32 33 34 35
2
17.
4) is used to check whether the Identification
1
0
MSB
7
6
5
Data Out 1
4
3
36 37 38
M95M01-DF M95M01-R
2
1
0
39
Data Out 2
7
MS30910V1