M95M01-DFDW6TP STMicroelectronics, M95M01-DFDW6TP Datasheet - Page 26

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M95M01-DFDW6TP

Manufacturer Part Number
M95M01-DFDW6TP
Description
EEPROM 1Mb SPI bus EEPROM 256kB 16MHz
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95M01-DFDW6TP

Rohs
yes

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0
Instructions
6.7
Figure 15. Read Identification Page sequence
26/45
S
C
D
Q
Read Identification Page (available only in M95M01-D
devices)
The Identification Page (256 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
Reading this page is achieved with the Read Identification Page instruction (see
The Chip Select signal (S) is first driven low, the bits of the instruction byte and address
bytes are then shifted in, on Serial Data Input (D). Address bit A10 must be 0, upper
address bits are Don't Care, and the data byte pointed to by the lower address bits [A7:A0]
is shifted out on Serial Data Output (Q). If Chip Select (S) continues to be driven low, the
internal address register is automatically incremented, and the byte of data at the new
address is shifted out.
The number of bytes to read in the ID page must not exceed the page boundary, otherwise
unexpected data is read (e.g.: when reading the ID page from location 90d, the number of
bytes should be less than or equal to 166d, as the ID page boundary is 256 bytes).
The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle. The first byte addressed can be any
byte within any page.
The instruction is not accepted, and is not executed, if a write cycle is currently in progress.
0
1
High impedance
2
Instruction
3
4
5
6
7
MSB
23
8
Doc ID 13264 Rev 11
22 21
9 10
24-bit address
3
28 29 30 31 32 33 34 35
2
1
0
MSB
7
6
5
Data Out 1
4
3
36 37 38
M95M01-DF M95M01-R
2
1
0
39
Data Out 2
7
Table
MS30907V1
4).

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