STM32F207ICH6 STMicroelectronics, STM32F207ICH6 Datasheet - Page 168

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STM32F207ICH6

Manufacturer Part Number
STM32F207ICH6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M3 CAM 256 kB
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F207ICH6

Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M3
Data Bus Width
32 bit

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Revision history
168/177
Table 94.
25-Nov-2010
Date
Document revision history (continued)
Revision
5
Update I/Os in
Added WLCSP66(64+2) package. Added note 1 related to LQFP176
on cover page.
Added trademark for
Adaptive real-time memory accelerator (ART
Updated
Added case of BOR inactivation using IRROFF on WLCSP devices in
Section 2.2.15: Power supply
Reworked
modes. Renamed PDROFF, IRROFF in the whole document.
Added
Updated LIN and IrDA features for UART4/5 in
comparison.
Table 6: STM32F20x pin and ball
added note related to the FSMC_NL pin; renamed BYPASS-REG
REGOFF, and add IRROFF pin; renamed USART4/5 UART4/5.
USART4 pins renamed UART4.
Changed V
Updated maximum HSE crystal frequency to 26 MHz.
Section 5.2: Absolute maximum
maximum values and note related to five-volt tolerant inputs in
Voltage
notes in
Updated V
conditions.
Added Note 2 and updated Maximum CPU frequency in
Limitations depending on the operating power supply
added
Added brownout level 1, 2, and 3 thresholds in
reset and power control block
Changed f
characteristics.
Changed f
and updated jitter parameters in
characteristics.
Section 5.3.16: I/O port
Table 44: I/O static
Added
Updated R
FS DC electrical
Updated V
Updated
Removed Ethernet and USB2 for 64-pin devices in
applications versus package for STM32F2xxx
Added
FS connection with external PHY” figure, updated
Figure
Doc ID 15818 Rev 9
Figure 19: Number of wait states versus fCPU and VDD
88, and
Section 2.2.19: VBAT
Note 1
A.2: Application example with regulator
characteristics. Updated I
Table 10: Current
Figure 5: Multi-AHB
Table 69: Embedded internal reference
OSC_IN
PLL_IN
DDA
REF+
Section 2.2.16: Voltage regulator
PD
SS_SA
and R
below
minimum value in
Section :
Figure 90
minimum value in
maximum value in
characteristics.
maximum value in
to V
characteristics.
PU
Table 45: Output voltage
ART accelerator.
SS
parameter description in
characteristics: updated V
, and V
Features.
to add STULPI01B.
characteristics.
operation.
matrix.
supervisor.
characteristics.
Changes
DD_SA
ratings: Updated V
Table 33: PLLI2S (audio PLL)
Table 12: General operating
INJ(PIN)
definitions: Modified V
Table 64: ADC
Table 32: Main PLL
Table 28: HSE 4-26 MHz oscillator
pin reserved for future use.
Updated
maximum values and related
to clarify regulator off
Accelerator™).
characteristics.
microcontrollers.
Table 5: USART feature
OFF, removed “OTG
Table 17: Embedded
Table 55: USB OTG
voltage.
characteristics.
Section 2.2.2:
IH
Figure
IN
Table 93: Main
and V
range, and
minimum and
STM32F20xxx
characteristics,
DD_3
Table 13:
87,
IL
in
pin, and
Table 9:
range.

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