STM32F207ICH6 STMicroelectronics, STM32F207ICH6 Datasheet - Page 19
STM32F207ICH6
Manufacturer Part Number
STM32F207ICH6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M3 CAM 256 kB
Manufacturer
STMicroelectronics
Datasheet
1.STM32F207VFT6TR.pdf
(177 pages)
Specifications of STM32F207ICH6
Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M3
Data Bus Width
32 bit
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STM32F20xxx
2.2.5
2.2.6
2.2.7
Figure 5.
S0
Cortex-M3
CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a software
signature during runtime, to be compared with a reference signature generated at link-time
and stored at a given memory location.
Embedded SRAM
All STM32F20x products embed:
●
●
Multi-AHB bus matrix
The 32-bit multi-AHB bus matrix interconnects all the masters (CPU, DMAs, Ethernet, USB
HS) and the slaves (Flash memory, RAM, FSMC, AHB and APB peripherals) and ensures a
seamless and efficient operation even when several high-speed peripherals work
simultaneously.
Multi-AHB matrix
ARM
S1
Up to 128 Kbytes of system SRAM accessed (read/write) at CPU clock speed with 0
wait states
4 Kbytes of backup SRAM.
The content of this area is protected against possible unwanted write accesses, and is
retained in Standby or V
S2
Bus matrix-S
DMA1
GP
S3
S4
DMA2
GP
BAT
Doc ID 15818 Rev 9
S5
mode.
Ethernet
MAC
S6
USB OTG
S7
HS
M4
M5
M6
M0
M1
M2
M3
DCODE
ICODE
Static MemCtl
112 Kbyte
16 Kbyte
SRAM
FSMC
memory
SRAM
periph
periph
AHB1
AHB2
Flash
Description
APB1
APB2
ai15963c
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