MPC8308CVMAGDA Freescale Semiconductor, MPC8308CVMAGDA Datasheet - Page 31
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MPC8308CVMAGDA
Manufacturer Part Number
MPC8308CVMAGDA
Description
Microprocessors - MPU E300 EXT TMP 400
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8308VMAGDA.pdf
(83 pages)
Specifications of MPC8308CVMAGDA
Rohs
yes
Processor Series
MPC8308
Core
e300
Maximum Clock Frequency
400 MHz
Interface Type
I2C, JTAG, UART
Operating Supply Voltage
0.95 V to 1.05 V
Maximum Operating Temperature
- 40 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-473
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8308CVMAGDA
Manufacturer:
FREESCAL
Quantity:
329
Company:
Part Number:
MPC8308CVMAGDA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8308CVMAGDA
Manufacturer:
FREESCALE
Quantity:
20 000
Figure 22
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
MPC8308 SerDes reference clock input’s DC requirement, AC-coupling has to be used.
This figure assumes that the LVPECL clock driver’s output impedance is 50 R1 is used to DC-bias the
LVPECL outputs prior to AC-coupling. Its value could be ranged from 140 to 240 depending on clock
driver vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-
termination resistor to attenuate the LVPECL output’s differential peak level such that it meets the
MPC8308’s SerDes reference clock’s differential input amplitude requirement (between 200 mV and
800 mV differential peak). For example, if the LVPECL output’s differential peak is 900 mV and the
desired SerDes reference clock input amplitude is selected as 600 mV, the attenuation factor is 0.67, which
requires R2 = 25 Please consult clock driver chip manufacturer to verify whether this connection
scheme is compatible with a particular clock driver chip.
Freescale Semiconductor
LVDS CLK Driver Chip
LVPECL CLK
Driver Chip
Clock Driver
Clock Driver
Clock Driver
Clock Driver
Figure 22. AC-Coupled Differential Connection with LVPECL Clock Driver (Reference Only)
Figure 21. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
CLK_Out
CLK_Out
CLK_Out
CLK_Out
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
10 nF
10 nF
R1
R1
100 differential PWB trace
R2
R2
100 differential PWB trace
10nF
10 nF
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
SD_REF_CLK
50
50
High-Speed Serial Interfaces (HSSI)
50
50
MPC8308
MPC8308
SerDes Refer.
CLK Receiver
SerDes Refer.
CLK Receiver
31