W65C816S6PG-14 Western Design Center (WDC), W65C816S6PG-14 Datasheet - Page 21

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W65C816S6PG-14

Manufacturer Part Number
W65C816S6PG-14
Description
Microprocessors - MPU 8/16-bit Microprocessor
Manufacturer
Western Design Center (WDC)
Datasheet

Specifications of W65C816S6PG-14

Rohs
yes
Processor Series
65x
Data Bus Width
8 bit, 16 bit
Maximum Clock Frequency
14 MHz
Operating Supply Voltage
1.8 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Package / Case
PDIP-40
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
10
3.5.9 Block Move-xyc
Block Move (xyc) addressing is used by the Block Move instructions. The second byte of the instruction
contains the high-order 8 bits of the destination address and the Y Index Register contains the low-
order 16 bits of the destination address. The third byte of the instruction contains the high-order 8 bits
of the source address and the X Index Register contains the low-order bits of the source address. The
C Accumulator contains one less than the number of bytes to move. The second byte of the block
move instructions is also loaded into the Data Bank Register.
Increment X and Y (MVN) or decrement X and Y (MVP) and decrement C (if greater than zero), then
PC=PC+3.
3.5.10 Direct Indexed Indirect-(d,x)
Direct Indexed Indirect ((d,x)) addressing is often referred to as Indirect X addressing. The second byte
of the instruction is added to the sum of the Direct Register and the X Index Register. The result points
to the X low-order 16 bits of the effective address. The Data Bank Register contains the high-order 8
bits of the effective address.
Source Address:
Dest. Address:
Instruction:
Operand Address:
then:
Instruction:
+
Opcode
srcbnk
dstbnk
Opcode
DBR
00
+
+
effective address
dstbnk
offset
Direct Register
direct address
X Reg
Y Reg
(address)
srcbnk
X Reg
offset
21

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