SIM3L146-C-GQ Silicon Labs, SIM3L146-C-GQ Datasheet - Page 16

• Manufacturer Part Number: SIM3L146-C-GQ
• Description: ARM Microcontrollers - MCU 64KB, DC-DC, 32x4 LCD, AES, QFN64
• Manufacturer: Silicon Labs

Specifications of SIM3L146-C-GQ

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: SiM3L1xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.8 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: TQFP-64
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 23
• Interface Type: I2C, SPI
• Length: 12 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 51
• Number Of Timers: 3
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 3.8 V
• Supply Voltage - Min: 1.8 V

Table 3.5. On-Chip Regulators (Continued)
SiM3L1xx
16
Memory LDO Output Setting
Digital LDO Output Setting
Analog LDO Output Setting During
Normal Operation
Notes:
1. See reference manual for recommended inductors.
2. Recommended: X7R or X5R ceramic capacitors with low ESR. Example: Murata GRM21BR71C225K with ESR < 10
3. Input voltage specification accounts for the internal LDO dropout voltage under the maximum load condition to ensure
4. The memory LDO output should always be set equal to or lower than the output of the analog LDO. When lowering both
5. Output range represents the programmable output range, and does not reflect the minimum voltage under all
6. Analog peripheral specifications assume a 1.8 V output on the analog LDO.
m (@ frequency > 1 MHz).
that the LDO output voltage will remain at a valid level as long as
LDOs (for example to go into PM8 under low supply conditions), first adjust the memory LDO and then the analog LDO.
When raising the output of both LDOs, adjust the analog LDO before adjusting the memory LDO.
conditions.
Parameter
6
5
V
V
V
Symbol
LDOMEM
LDOANA
LDODIG
During Programming
Rev 0.5
Test Condition
F
F
During Normal
AHB
AHB
Operation
< 20 MHz
> 20 MHz
V
LDOIN
is at or above the specified minimum.
Min
1.8
1.5
1.0
1.2
Typ
1.8
—
—
—
—
Max
1.9
1.9
1.9
1.9
Unit
V
V
V
V
V