S912XEP100J5VAGR Freescale Semiconductor, S912XEP100J5VAGR Datasheet - Page 209
S912XEP100J5VAGR
Manufacturer Part Number
S912XEP100J5VAGR
Description
16-bit Microcontrollers - MCU 16-bit 1000K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEP100J5VAGR
Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
1000 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Available stocks
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3.4.2.3
The global memory spaces reserved for the internal resources (RAM, EEE, and FLASH) are not
determined by the MMC module. Size of the individual internal resources are however fixed in the design
of the device cannot be changed by the user. Please refer to the Device User Guide for further details.
Figure 3-19
the memory spaces have fixed top addresses.
When the device is operating in expanded modes except emulation single-chip mode, accesses to global
addresses which are not occupied by the on-chip resources (unimplemented areas or external memory
space) result in accesses to the external bus (see
Freescale Semiconductor
Bit22
Bit22
and
Implemented Memory Map
Table 3-17
BDMGPR Register [6:0]
BDMGPR Register [6:0]
1. RAMSIZE is the hexadecimal value of RAM SIZE in bytes
2. FLASHSIZE is the hexadecimal value of FLASH SIZE in bytes
Internal Resource
FLASH
show the memory spaces occupied by the on-chip resources. Please note that
RAM
Table 3-17. Global Implemented Memory Space
MC9S12XE-Family Reference Manual Rev. 1.25
Figure 3-18. BDMGPR Address Mapping
BDM HARDWARE COMMAND
BDM FIRMWARE COMMAND
Global Address [22:0]
Global Address [22:0]
Bit16
Bit16
FLASH_LOW = 0x80_0000 minus FLASHSIZE
RAM_LOW = 0x10_0000 minus RAMSIZE
Bit15
Bit15
Figure
3-19).
$Address
BDM Local Address
Chapter 3 Memory Mapping Control (S12XMMCV4)
CPU Local Address
(1)
(2)
Bit0
Bit0
209
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