S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 603

• Manufacturer Part Number: S9S12G64F0CLFR
• Description: 16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F0CLFR

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1
18.3.2.14 MSCAN Miscellaneous Register (CANMISC)
This register provides additional features.
1
18.3.2.15 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
1
Freescale Semiconductor
Module Base + 0x000D
Module Base + 0x000E
BOHOLD
Read: Always reads zero in normal system operation modes
Write: Unimplemented in normal system operation modes
Read: Anytime
Write: Anytime; write of ‘1’ clears flag; write of ‘0’ ignored
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
Field
0
Reset:
Reset:
W
W
R
R
Bus-off State Hold Until User Request — If BORM is set in
indicates whether the module has entered the bus-off state. Clearing this bit requests the recovery from bus-off.
Refer to
0 Module is not bus-off or recovery has been requested by user in bus-off state
1 Module is bus-off and holds this state until user request
RXERR7
Writing to this register when in special system operating modes can alter the
MSCAN functionality.
0
0
0
7
7
Section 18.5.2, “Bus-Off
Figure 18-18. MSCAN Receive Error Counter (CANRXERR)
Figure 18-17. MSCAN Miscellaneous Register (CANMISC)
RXERR6
= Unimplemented
= Unimplemented
Table 18-21. CANMISC Register Field Descriptions
6
0
0
6
0
MC9S12G Family Reference Manual, Rev.1.23
RXERR5
0
0
Recovery,” for details.
0
5
5
RXERR4
NOTE
4
0
0
4
0
Description
Freescale’s Scalable Controller Area Network (S12MSCANV3)
RXERR3
0
0
0
3
MSCAN Control Register 1 (CANCTL1),
3
RXERR2
2
0
0
2
0
RXERR1
Access: User read/write
Access: User read/write
0
0
0
1
1
BOHOLD
RXERR0
this bit
0
0
0
0
605
1
1