S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 177

no-image

S9S12G64F0CLFR

Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G64F0CLFR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
2.3.11
Freescale Semiconductor
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
Pins PJ7-0
• 64/100 LQFP: The SPI2 SS signal is mapped to this pin when used with the SPI function. Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 SCK signal is mapped to this pin when used with the SPI function. Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 MOSI signal is mapped to this pin when used with the SPI function.
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• 64/100 LQFP: The SPI2 MISO signal is mapped to this pin when used with the SPI function.Depending
• 64/100 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP and 32 LQFP: The SPI1 SS signal is mapped to this pin when used with the SPI
• 48 LQFP: The PWM channel 7 signal is mapped to this pin when used with the PWM function. The
• Except 20 TSSOP and 32 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
• Except 20 TSSOP and 32 LQFP: The SPI1 SCK signal is mapped to this pin when used with the SPI
• 48 LQFP: The TIM channel 7 signal is mapped to this pin when used with the TIM function. The TIM
• Except 20 TSSOP and 32 LQFP: Pin interrupts can be generated if enabled in input or output mode.
• Signal priority:
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: SS2 > GPO
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: SCK2 > GPO
Depending on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: MOSI2 > GPO
on the configuration of the enabled SPI2 the I/O state is forced to be input or output.
64/100 LQFP: MISO2 > GPO
function. Depending on the configuration of the enabled SPI1 the I/O state is forced to be input or
output.
enabled PWM channel forces the I/O state to be an output.
48 LQFP: SS1 > PWM7 > GPO
64/100 LQFP: SS1 > GPO
function. Depending on the configuration of the enabled SPI1 the I/O state is forced to be input or
output.
forces the I/O state to be an output for a timer port associated with an enabled output.
48 LQFP: SCK1 > IOC7 > GPO
64/100 LQFP: SCK1 > GPO
MC9S12G Family Reference Manual, Rev.1.23
Table 2-15. Port
J
Pins PJ7-0
Port Integration Module (S12GPIMV1)
179

Related parts for S9S12G64F0CLFR