634-597AF000242DG Silicon Labs, 634-597AF000242DG Datasheet - Page 4

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634-597AF000242DG

Manufacturer Part Number
634-597AF000242DG
Description
Standard Clock Oscillators VCXO
Manufacturer
Silicon Labs
Datasheet

Specifications of 634-597AF000242DG

Product Category
Standard Clock Oscillators
Rohs
yes
Si 597
Table 5. CLK± Output Phase Jitter
Table 6. CLK± Output Period Jitter
Table 7. CLK± Output Phase Noise (Typical)
4
Phase Jitter (RMS)
for F
810 MHz
Notes:
Period Jitter*
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
Offset Frequency
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN256 and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest K
OUT
requirements. See “AN266: VCXO Tuning Slope (K
100 kHz
10 MHz
20 MHz
100 Hz
10 kHz
of 50 MHz < F
1 MHz
1 kHz
Parameter
Parameter
1,2
OUT
<
185 ppm/V
74.25 MHz
LVPECL
Symbol
Symbol
J
–101
–121
–134
–149
–151
–150
–77
PER
J
Kv = 125 ppm/V
Kv = 185 ppm/V
Kv = 380 ppm/V
Test Condition
Test Condition
Kv = 45 ppm/V
Kv = 95 ppm/V
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
12 kHz to 20 MHz
V
Rev. 1.0
Peak-to-Peak
), Stability, and Absolute Pull Range (APR)” for more information.
RMS
185 ppm/V
148.5 MHz
LVPECL
–128
–144
–147
–148
–116
–68
–95
V
that meets the application’s minimum APR
Min
Min
155.52 MHz
95 ppm/V
LVPECL
–101
–127
–144
–147
–148
–119
–77
Typ
Typ
0.5
0.5
0.5
0.5
0.7
35
3
Max
Max
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Unit
Unit
Unit
ps
ps
ps
ps
ps
ps
ps

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