634-597AF000242DG Silicon Labs, 634-597AF000242DG Datasheet

no-image

634-597AF000242DG

Manufacturer Part Number
634-597AF000242DG
Description
Standard Clock Oscillators VCXO
Manufacturer
Silicon Labs
Datasheet

Specifications of 634-597AF000242DG

Product Category
Standard Clock Oscillators
Rohs
yes
O
Q
Features
Applications
Description
The Si597 quad frequency VCXO utilizes Silicon Laboratories’ advanced
DSPLL
Si597 is available with one of four pin-selectable ouput frequencies from 10
to 810 MHz. Unlike traditional VCXOs, where a different crystal is required
for each output frequency, the Si597 uses one fixed crystal to provide a wide
range of output frequencies. This IC-based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides supply noise rejection, simplifying
the task of generating low-jitter clocks in noisy environments. The Si597 IC-
based quad frequency VCXO is factory-configurable for a wide variety of
user specifications including frequencies, supply voltage, output format,
tuning slope, and absolute pull range (APR). Specific configurations are
factory programmed at time of shipment, thereby eliminating the long lead
times associated with custom oscillators.
Functional Block Diagram
Rev. 1.0 12/11
Available with any-frequency
output from 10 to 810 MHz
4 selectable output frequencies
3rd generation DSPLL
superior jitter performance
Internal fixed fundamental mode
crystal frequency ensures high
reliability and low aging
SONET/SDH (OC-3/12/48)
Networking
SD/HD SDI/3G SDI video
SCILLATOR
UAD
®
V
O E
c
circuitry to provide a low-jitter clock for all output frequencies. The
F
R E Q U E N C Y
F re q u e n cy
G N D
O s cilla to r
A D C
F ixe d
®
( V C X O ) 1 0
with
P o w e r S u p p ly F ilte rin g
P o w e r S u p p ly F ilte rin g
V
OTN
Clock recovery and jitter cleanup PLLs
FPGA/ASIC clock generation
D D
C lo c k S y n th e s is
A n y F re q u e n c y
F S 0
1 0 – 8 1 0 M H z
Copyright © 2011 by Silicon Laboratories
V
D S P L L
C o n tro l
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
–40 to +85 ºC operating range
O L TAG E
F S 1
TO
- C
810 MH
O N T R O L L E D
C L K +
C L K -
Z
GND
Ordering Information:
OE
V
C
Pin Assignments:
C
1
2
3
See page 7.
See page 6.
RYSTAL
(Top View)
Si5602
FS[1]
FS[0]
7
8
Si597
6
5
4
V
CLK–
CLK+
DD
Si597

Related parts for 634-597AF000242DG

634-597AF000242DG Summary of contents

Page 1

Q F UAD SCILLATOR Features  Available with any-frequency output from 10 to 810 MHz  4 selectable output frequencies ®  3rd ...

Page 2

Si 597 1. Electrical Specifications Table 1. Recommended Operating Conditions Parameter 1 Supply Voltage Supply Current 2 Output Enable (OE) and Frequency Select (FS[1:0]) Operating Temperature Range Notes: 1. Selectable parameter specified by part number. See 3. "Ordering Information" on ...

Page 3

Table 3. CLK± Output Frequency Characteristics Parameter Symbol 1,2,3 f Nominal Frequency O 1,4 Temperature Stability 1,4 Absolute Pull Range APR 5 Power up Time t OSC Notes: 1. See Section 3. "Ordering Information" on page 7 for further details. ...

Page 4

Si 597 Table 5. CLK± Output Phase Jitter Parameter Symbol 1,2 Phase Jitter (RMS) for MHz < F < OUT OUT 810 MHz Notes: 1. Differential Modes: LVPECL/LVDS/CML. Refer to AN256 and AN266 for further information. 2. ...

Page 5

Table 8. Environmental Compliance and Package Information Parameter Mechanical Shock Mechanical Vibration Solderability Gross and Fine Leak Resistance to Solder Heat Moisture Sensitivity Level Contact Pads Table 9. Thermal Characteristics (Typical values º 3.3 V) ...

Page 6

Si 597 2. Pin Descriptions Pin Name OE* 3 GND 4 CLK+ CLK– 5 (N/C for CMOS FS[1] 8 FS[0] *Note: OE pin includes a 17 k resistor to V See 3. ...

Page 7

... Specific device configurations are programmed into the Si597 at time of shipment. Configurations are DD specified using the Part Number Configuration chart shown below. Silicon Labs provides a web browser-based part number configuration utility to simplify this process. Refer to and for further ordering instructions. The Si597 VCXO series is supplied in an industry-standard, RoHS compliant, lead-free, 8-pad package ...

Page 8

Si 597 4. Outline Diagram and Suggested Pad Layout Figure 2 illustrates the package details for the Si598/Si599. Table 12 lists the values for the dimensions shown in the illustration.   Table 12. Package Diagram Dimensions (mm) Dimension A b ...

Page 9

PCB Land Pattern Figure 3 illustrates the 8-pin PCB land pattern for the Si597. Table 13 lists the values for the dimensions shown in the illustration. Table 13. PCB Land Pattern Dimensions (mm) Dimension ...

Page 10

Si 597 6. Si597 Mark Specification Figure 4 illustrates the mark specification for the Si597. Table 14 lists the line information.   Table 14. Si5xx Top Mark Description Line Position 1 1–10 “SiLabs”+ Part Family Number, 597 (First 3 characters ...

Page 11

OCUMENT HANGE IST Revision 0.1 to Revision 1.0  Changed frequency range 810 MHz.  Changed output frequencies in Description section on page 1.  Updated functional block diagram on page 1.  Corrected ...

Page 12

... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and DSPLL are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...

Related keywords