SSTUAF32869AHLFT IDT, Integrated Device Technology Inc, SSTUAF32869AHLFT Datasheet - Page 8

• Manufacturer Part Number: SSTUAF32869AHLFT
• Description: IC REGIST BUFF 25BIT DDR2 150BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTUAF32869AHLFT

• Logic Type: 1:2 Configurable Registered Buffer
• Supply Voltage: 1.7 V ~ 1.9 V
• Number Of Bits: 14
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 150-CABGA, CTBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parity and Standby Function Table
14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
ICSSSTUAF32869A
14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
RESET
1
2
3
4
PTYERR is LOW, it stays latched LOW for two clock cycles or until RESET is driven LOW. PARIN is used to
generate PPO and PTYERR.
H
H
H
H
H
H
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW to HIGH
↓ = HIGH to LOW
This range does not include D1, D4, and D7.
PARIN arrives one clock cycle (C1 = 0), or two clock cycles (C1 = 1), after the data to which it applies.
This transition assumes PTYERR is HIGH at the crossing of CLK going HIGH and CLK going LOW. If
Floating
DCS
X or
H
X
L
L
L
L
L
L
L
L
Floating
CSR
X or
H
X
X
X
X
X
L
L
L
L
Floating
L or H
CLK
X or
↑
↑
↑
↑
↑
↑
↑
↑
↑
Inputs
Floating
L or H
CLK
X or
1
↓
↓
↓
↓
↓
↓
↓
↓
↓
Σ of Inputs = H
8
(D1 - D14)
X or Floating
Even
Even
Even
Even
Odd
Odd
Odd
Odd
X
X
2
X or Floating
PARIN
COMMERCIAL TEMPERATURE GRADE
H
H
H
H
X
X
L
L
L
L
3
ICSSSTUAF32869A
PPOn
PPOn
PPO
H
H
H
H
L
L
L
L
L
0
0
Outputs
PTYERRn
PTYERRn
PTYERR
H
H
H
H
H
L
L
L
L
7095/14
4
0
0