SSTUA32S865ET/G;55 NXP Semiconductors, SSTUA32S865ET/G;55 Datasheet - Page 25

• Manufacturer Part Number: SSTUA32S865ET/G;55
• Description: IC BUFFER 1.8V 28BIT SOT802
• Manufacturer: NXP Semiconductors

Specifications of SSTUA32S865ET/G;55

• Logic Type: 1:2 Registered Buffer with Parity
• Supply Voltage: 1.7 V ~ 2 V
• Number Of Bits: 28
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935279445557; SSTUA32S865ET/G; SSTUA32S865ET/G

NXP Semiconductors
SSTUA32S865_2
Product data sheet
13.4 Reflow soldering
Key characteristics in reflow soldering are:
Table 12.
Table 13.
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see
Package thickness (mm)
< 2.5
Package thickness (mm)
< 1.6
1.6 to 2.5
> 2.5
•
•
•
2.5
Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see
reducing the process window
Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 12
SnPb eutectic process (from J-STD-020C)
Lead-free process (from J-STD-020C)
and
Figure
13
23.
Rev. 02 — 16 March 2007
Package reflow temperature ( C)
Volume (mm
< 350
235
220
Package reflow temperature ( C)
Volume (mm
< 350
260
260
250
3
3
)
)
1.8 V DDR2-667 registered buffer with parity
Figure
350 to 2000
260
250
245
23) than a PbSn process, thus
220
220
SSTUA32S865
350
> 2000
260
245
245
© NXP B.V. 2007. All rights reserved.
25 of 29