IS43DR32800A-5BBL ISSI, IS43DR32800A-5BBL Datasheet - Page 19

• Manufacturer Part Number: IS43DR32800A-5BBL
• Description: DRAM 256M (8Mx32) 200MHz Commercial Temp
• Manufacturer: ISSI

Specifications of IS43DR32800A-5BBL

• Product Category: DRAM
• Rohs: yes
• Data Bus Width: 32 bit
• Package / Case: WBGA-126
• Memory Size: 256 Mbit
• Maximum Clock Frequency: 400 MHz
• Access Time: 0.6 ns
• Supply Voltage - Max: 1.9 V
• Supply Voltage - Min: 1.7 V
• Maximum Operating Current: 210 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 162

IS43DR32800A, IS43/46DR32801A
Data Input (Write) Timing
Data Output (Read) Timing
5. AC timings are for linear signal transitions. See Specific Notes on derating for other signal transitions.
6. All voltages are referenced to VSS.
7. These parameters guarantee device behavior, but they are not necessarily tested on each device They may be
guaranteed by device design or tester correlation.
8. Tests for AC timing, IDD, and electrical (AC and DC) characteristics, may be conducted at nominal reference/supply
voltage levels, but the related specifications and device operation are guaranteed for the full voltage range specified.
Specific Notes for Dedicated AC Parameters
1. User can choose which active power down exit timing to use via Mode Register Set [A12]. tXARD is expected to be
used for fast active power down exit timing. tXARDS is expected to be used for slow active power down exit timing.
2. AL = Additive Latency.
3. This is a minimum requirement. Minimum read to precharge timing is AL + BL / 2 provided that the tRTP and
tRAS(min) have been satisfied.
4. A minimum of two clocks (2 x tCK or 2 x nCK) is required irrespective of operating frequency.
5. Timings are specified with command/address input slew rate of 1.0 V/ns. See Specific Notes on derating for other
slew rate values.
6. Timings are specified with DQs, DM, and DQS’s (DQS in single ended mode) input slew rate of 1.0V/ns. See
Specific Notes on derating for other slew rate values.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00E
09/08/2010
DQS/
DQS
DQ
DM
CK/CK
DQS/DQS
DQ
CK
CK
t
DQS
DQS
WPRE
DQS
DQS
t
V
V
CH
IH
IL
(ac)
(ac)
t
DMin
DS
D
t
RPRE
t
DQSH
V
V
t
t
IH
CL
IL
DQSQmax
(ac)
(ac)
DMin
t
DS
D
t
DQSL
t
QH
Q
DMin
D
t
DH
V
V
IH
IL
(dc)
(dc)
Q
DMin
D
t
DH
V
V
IH
IL
t
(dc)
WPST
(dc)
t
DQSQmax
Q
t
t
RPST
QH
Q
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