SSTUB32866EC/G,518 NXP Semiconductors, SSTUB32866EC/G,518 Datasheet - Page 6
![IC REG BUFFER 25BIT 96-LFBGA](/photos/7/6/70664/96-lfbga_sot536-1_pkg_sml.jpg)
SSTUB32866EC/G,518
Manufacturer Part Number
SSTUB32866EC/G,518
Description
IC REG BUFFER 25BIT 96-LFBGA
Manufacturer
NXP Semiconductors
Datasheet
1.SSTUB32866ECG518.pdf
(30 pages)
Specifications of SSTUB32866EC/G,518
Logic Type
1:1, 1:2 Configurable Registered Buffer with Parity
Package / Case
96-LFBGA
Supply Voltage
1.7 V ~ 2 V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Logic Family
SSTU
Number Of Circuits
1
Maximum Clock Frequency
450 MHz
Propagation Delay Time
1.5 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
2 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3543-2
935281279518
SSTUB32866EC/G-T
935281279518
SSTUB32866EC/G-T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SSTUB32866EC/G,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SSTUB32866_4
Product data sheet
Fig 5.
Fig 6.
Ball mapping, 1 : 2 Register A (C0 = 0, C1 = 1)
Ball mapping, 1 : 2 Register B (C0 = 1, C1 = 1)
All information provided in this document is subject to legal disclaimers.
G
M
G
M
A
B
C
D
E
F
H
K
N
P
R
T
A
B
C
D
E
F
H
K
N
P
R
T
J
L
J
L
Rev. 04 — 15 April 2010
PAR_IN
PAR_IN
DODT
DODT
DCKE
DCKE
D10
D11
D12
D13
D14
D10
D12
D13
D2
D3
D5
D6
CK
CK
D8
D1
D2
D3
D4
D5
D6
CK
CK
D8
D9
D9
1
1
1.8 V DDR2-800 configurable registered buffer with parity
RESET
RESET
QERR
QERR
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
PPO
DCS
CSR
PPO
DCS
CSR
n.c.
n.c.
2
2
VREF
VREF
VREF
VREF
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
3
3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
4
DD
DD
DD
DD
DD
DD
DD
DD
DD
4
DD
DD
DD
DD
DD
DD
DD
DD
DD
QCKEA
QCKEA
QODTA
QODTA
QCSA
QCSA
Q10A
Q11A
Q12A
Q13A
Q14A
Q10A
Q12A
Q13A
Q2A
Q3A
Q5A
Q6A
Q8A
Q9A
Q1A
Q2A
Q3A
Q4A
Q5A
Q6A
Q8A
Q9A
n.c.
n.c.
C1
C1
5
5
002aab110
002aab109
SSTUB32866
QODTB
QODTB
QCKEB
QCKEB
QCSB
QCSB
Q10B
Q11B
Q12B
Q13B
Q14B
Q10B
Q12B
Q13B
Q2B
Q3B
Q5B
Q6B
Q8B
Q9B
Q1B
Q2B
Q3B
Q4B
Q5B
Q6B
Q8B
Q9B
n.c.
n.c.
C0
C0
6
6
© NXP B.V. 2010. All rights reserved.
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