SSTUB32866EC/G,518 NXP Semiconductors, SSTUB32866EC/G,518 Datasheet - Page 4

IC REG BUFFER 25BIT 96-LFBGA

SSTUB32866EC/G,518

Manufacturer Part Number
SSTUB32866EC/G,518
Description
IC REG BUFFER 25BIT 96-LFBGA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTUB32866EC/G,518

Logic Type
1:1, 1:2 Configurable Registered Buffer with Parity
Package / Case
96-LFBGA
Supply Voltage
1.7 V ~ 2 V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Logic Family
SSTU
Number Of Circuits
1
Maximum Clock Frequency
450 MHz
Propagation Delay Time
1.5 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
2 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3543-2
935281279518
SSTUB32866EC/G-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUB32866EC/G,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SSTUB32866_4
Product data sheet
Fig 2.
D2, D3, D5, D6,
Parity logic diagram for 1 : 2 Register A configuration (positive logic); C0 = 0, C1 = 1
D8 to D14
PAR_IN
RESET
VREF
CK
CK
C1
C0
11
D2, D3, D5, D6,
R
COUNTER
(internal node)
CLK
2-BIT
All information provided in this document is subject to legal disclaimers.
D8 to D14
D
R
D
R
LPS0
CLK
CLK
CE
PARITY
CHECK
Rev. 04 — 15 April 2010
11
0
1
1.8 V DDR2-800 configurable registered buffer with parity
(internal node)
LPS1
D
R
CLK
CE
11
D2, D3, D5, D6,
D8 to D14
D
R
CLK
D
R
CLK
0
1
1
0
SSTUB32866
002aaa650
11
11
© NXP B.V. 2010. All rights reserved.
Q2A, Q3A,
Q5A, Q6A,
Q8A to Q14A
Q2B, Q3B,
Q5B, Q6B,
Q8B to Q14B
PPO
QERR
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