STM8S003F3P6TR STMicroelectronics, STM8S003F3P6TR Datasheet - Page 81

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STM8S003F3P6TR

Manufacturer Part Number
STM8S003F3P6TR
Description
STM8 Series 8-bit 8 KB Flash 1 KB RAM 16 MHz Microcontroller - TSSOP-20
Manufacturer
STMicroelectronics
Datasheet

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STM8S003K3 STM8S003F3
9.3.10
Symbol
t
t
C
(1)
(2)
(3)
low time
(4)
the undefined region of the falling edge of SCL
w(STO:ST A)
su(STO)
b
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge
f
Data based on standard I
The maximum hold time of the start condition has only to be met if the interface does not stretch the
MASTER
Parameter
STOP condition setup time
STOP to START condition time
(bus free)
Capacitive load for each bus line
, must be at least 8 MHz to achieve max fast I
1. Measurement points are made at CMOS levels: 0.3 x VDD and 0.7 x VDD.
10-bit ADC characteristics
Subject to general operating conditions for V
Figure 41: Typical application with I
SDA
SCL
I
2
t
C bus
f(SDA)
2
C protocol requirement, not tested in production
t
h(STA)
START
4.7k
t
w(SCLH)
t
r(SDA)
V DD
t
w(SCLL)
DocID018576 Rev 3
4.7k
V DD
t
su(SDA)
Standard mode I
Min
t
r(SCL)
4.0
4.7
100
100
(2)
t
h(SDA)
t
f(SCL)
2
SDA
SCL
DD
C speed (400kHz)
, f
MASTER
STM8S
2
C bus and timing diagram
2
C
Max
, and T
400
(2)
t
su(STA)
A
t
su(STO)
Fast mode I
Min
unless otherwise specified.
Electrical characteristics
0.6
1.3
t
STOP
w(STO:STA)
(2)
REPEATED
START
Max
ai17490
400
START
2
C
(2)
(1)
Unit
μs
pF
81/100

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