STM8S003F3P6TR STMicroelectronics, STM8S003F3P6TR Datasheet - Page 41

• Manufacturer Part Number: STM8S003F3P6TR
• Description: STM8 Series 8-bit 8 KB Flash 1 KB RAM 16 MHz Microcontroller - TSSOP-20
• Manufacturer: STMicroelectronics

STM8S003K3 STM8S003F3
8
Addr.
0x4800
0x4801
0x4802
0x4803
0x4804
0x4805h
0x4806
0x4807
0x4808
0x4809
0x480A
Option
name
Read-out
protection
(ROP)
User boot
code(UBC)
Alternate
function
remapping
(AFR)
Miscell.
option
Clock
option
HSE clock
startup
Option bytes
Option bytes contain configurations for device hardware features as well as the memory
protection of the device. They are stored in a dedicated block of the memory. Except for the
ROP (read-out protection) byte, each option byte has to be stored twice, in a regular form
(OPTx) and a complemented one (NOPTx) for redundancy.
Option bytes can be modified in ICP mode (via SWIM) by accessing the EEPROM address
shown in the table below.
Option bytes can also be modified ‘on the fly’ by the application in IAP mode, except the ROP
option that can only be modified in ICP mode (via SWIM).
Refer to the STM8S Flash programming manual (PM0051) and STM8 SWIM communication
protocol and debug module user manual (UM0470) for information on SWIM programming
procedures.
Option byte no.
OPT0
Option
byte no.
OPT0
OPT1
NOPT1
OPT2
NOPT2
OPT3
NOPT3
OPT4
NOPT4
OPT5
NOPT5
Option bits
7
ROP [7:0]
UBC [7:0]
NUBC [7:0]
AFR7
NAFR7
Reserved
Reserved
Reserved
Reserved
HSECNT [7:0]
NHSECNT [7:0]
Description
6
ROP[7:0] Memory readout protection (ROP)
0xAA: Enable readout protection (write access via SWIM protocol)
AFR6
NAFR6
Table 11: Option bytes
Table 12: Option byte description
DocID018576 Rev 3
5
AFR5
NAFR5
4
AFR4
NAFR4
HSI
TRIM
NHSI
TRIM
3
AFR3
NAFR3
LSI_ EN
NLSI_
EN
EXT CLK
NEXT
CLK
2
AFR2
NAFR2
IWDG
_HW
NIWDG
_HW
CKAWU
SEL
NCKA
WUSEL
1
AFR1
NAFR1
WWDG
_HW
NWWDG
_HW
PRS C1
NPRSC1
0
AFR0
NAFR0
WWDG
_HALT
NWW
G_HALT
PRS C0
NPR
SC0
Option bytes
Factory
default
setting
0x00
0xFF
0xFF
0xFF
0xFF
0xFF
41/100
0x00
0x00
0x00
0x00
0x00