SI5351A-A-GMR Silicon Laboratories, SI5351A-A-GMR Datasheet - Page 38

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SI5351A-A-GMR

Manufacturer Part Number
SI5351A-A-GMR
Description
Control: I2C; Reference Inputs: 1; Clock Outputs: 8; Input Frequency (MHz): 25/27 MHz (Xtal); Output Frequency (MHz):...
Manufacturer
Silicon Laboratories
Datasheet
Si5351A/B/C
Reset value = 0000 0000
Reset value = 0000 0000
38
Register 24. CLK3–0 Disable State
Register 25. CLK7–4 Disable State
Name
Name
7:0
Bit
Bit
7:0
Type
Type
Bit
Bit
CLKx_DIS_STATE
CLKx_DIS_STATE
CLK3_DIS_STATE
CLK7_DIS_STATE
D7
D7
Name
Name
R/W
R/W
D6
D6
Clock x Disable State.
Where x = 4, 5, 6, 7. These 2 bits determine the state of the CLKx output when dis-
abled. Individual output clocks can be disabled using register Output Enable Con-
trol located at address 3. Outputs are also disabled using the OEB pin.
00: CLKx is set to a LOW state when disabled.
01: CLKx is set to a HIGH state when disabled.
10: CLKx is set to a HIGH IMPEDANCE state when disabled.
11: CLKx is NEVER DISABLED.
Clock x Disable State.
Where x = 0, 1, 2, 3. These 2 bits determine the state of the CLKx output when dis-
abled. Individual output clocks can be disabled using register Output Enable Con-
trol located at address 3. Outputs are also disabled using the OEB pin.
00: CLKx is set to a LOW state when disabled.
01: CLKx is set to a HIGH state when disabled.
10: CLKx is set to a HIGH IMPEDANCE state when disabled.
11: CLKx is NEVER DISABLED.
CLK2_DIS_STATE
CLK6_DIS_STATE
D5
D5
R/W
R/W
Preliminary Rev. 0.95
D4
D4
CLK1_DIS_STATE
CLK5_DIS_STATE
D3
Function
D3
Function
R/W
R/W
D2
D2
CLK0_DIS_STATE
CLK4_DIS_STATE
D1
D1
R/W
R/W
D0
D0

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