SI5351A-A-GMR Silicon Laboratories, SI5351A-A-GMR Datasheet - Page 20

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SI5351A-A-GMR

Manufacturer Part Number
SI5351A-A-GMR
Description
Control: I2C; Reference Inputs: 1; Clock Outputs: 8; Input Frequency (MHz): 25/27 MHz (Xtal); Output Frequency (MHz):...
Manufacturer
Silicon Laboratories
Datasheet
Si5351A/B/C
5.6. Replacing a Crystal with a Clock
The Si5351 can be driven with a clock signal through the XA input pin.
5.7. HCSL Compatible Outputs
The Si5351 can be configured to support HCSL compatible swing when the VDDO of the output pair of interest is
set to 2.5 V (i.e., VDDOA must be 2.5 V when using CLK0/1; VDDOB must be 2.5 V for CLK2/3 and so on).
The circuit in the figure below must be applied to each of the two clocks used, and one of the clocks in the pair
must also be inverted to generate a differential pair. See register setting CLKx_INV.
20
Note: Float the XB input while driving
OSC
PLLA
PLLB
Figure 17. Si5350C Output is HCSL Compatible
the XA input with a clock
Figure 16. Si5351 Driven by a Clock Signal
V
25/27 MHz
Synth
Synth
Synth
Multi
Multi
Multi
IN
1
N
0
= 1 V
Preliminary Rev. 0.95
PP
0.1 µF
Note: The complementary -180 degree
out of phase output clock is generated
using the INV function
XA
XB
0 
0 
OSC
Z
Z
O
O
= 70 
= 70 
PLLA
PLLB
511 
511 
R
R
240 
240 
1
1
Synth
Synth
Synth
Multi
Multi
Multi
R
R
0
1
N
2
2
HCSL
CLKIN

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