PE4240-EK PEREGRINE [Peregrine Semiconductor Corp.], PE4240-EK Datasheet - Page 2

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PE4240-EK

Manufacturer Part Number
PE4240-EK
Description
Manufacturer
PEREGRINE [Peregrine Semiconductor Corp.]
Datasheet
Figure 3. Pin Configuration
Table 2. Pin Descriptions
Notes: 1. A bypass capacitor should be placed as close as possible
Table 3. Absolute Maximum Ratings
Absolute Maximum Ratings are those values listed
in the above table. Exceeding these values may
cause permanent device damage. Functional
operation should be restricted to the limits in the DC
Electrical Specifications table. Exposure to absolute
maximum ratings for extended periods may affect
device reliability.
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
1
2
3
4
5
6
Pin
No.
Symbol
GND
RF2
RF1
V
V
T
T
P
V
ESD
OP
DD
ST
IN
I
2. Both RF pins must be held at 0 V
3. The exposed pad must be soldered to the ground plane for
V
GND
RF1
CTRL
GND
RF2
blocking capacitors.
proper switch performance.
to the pin.
Name
DD
Pin
1
2
3
Power supply voltage
Voltage on CTRL input
Storage temperature
Operating temperature
Input power (50Ω),
CTRL=1/CTRL=0
ESD voltage
(Human Body Model)
Parameter/Condition
Exposed Solder
Pad - Shorted
(bottom side)
to Pin 2
Nominal 3 V supply connection.
Ground connection.
RF port.
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
Ground connection.
RF port.
2
2
6
5
4
Description
RFC
CTRL
V
3
3
DD
AC
Min
-0.3
-0.3
or require external DC
-65
-40
33/24
1
Max
150
200
4.0
5.5
85
Unit
dBm
°C
°C
V
V
V
CATVin
Table 4. DC Electrical Specifications @ 25 °C
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Description
The PE4240 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typically performed by bulky
and expensive mechanical switches. The high
isolation characteristics (>44 dB at 1 GHz,
at 5 MHz), high compression point, and an
integrated 75-ohm terminations make the PE4240
an ideal, low cost solution.
Figure 4. Typical Application Block Diagram
Table 5. Control Logic Truth Table
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of V
systems that have 5-volt control logic drivers, the
control logic input has been designed to handle a 5-
volt logic HIGH signal. (A minimal current will be
sourced out of the V
put voltage level exceeds V
Control Voltage (CTRL)
V
I
(V
Control Voltage High
Control Voltage Low
High
Low
DD
DD
DD
Power Supply Current
1
Power Supply
= 3V, V
Parameter
Document No. 70-0067-03 │ UltraCMOS™ RFIC Solutions
Splitter
2-way
CNTL
= 3V)
Premium
DD
Channel
Filter
DD
pin when the control logic in-
. For flexibility to support
70% V
ON
OFF
Min
Signal Path (RF1 to RF2)
2.7
0
DD.
DD
)
PE4240
PE4240
Typ
3.0
33
Product Specification
30% V
Max
3.3
40
5
DD
PE4240
85 dB
CATVout
Unit
µA
V
V
V

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