GL843 GENESYS [GENESYS LOGIC], GL843 Datasheet - Page 29

• Manufacturer Part Number: GL843
• Description: High Speed USB 2.0 With ADF 2-in-1 Scanner Controller
• Manufacturer: GENESYS [GENESYS LOGIC]

0 Enable CCD CP & RS signals under CCD TG position as illustrated.
©2000-2006 Genesys Logic Inc. - All rights reserved.
Offset 17h ……………………………………………..…………..……….……. Default value = 8’h14
Offset 18h ……………………………………………..…………..……..………. Default value = 8’h00
7-6 TGMODE[1:0] To set CCD TG mode.
5-0 TGW[5:0]
6-5 DCKSEL1[1:0] 00 Speed 1: one CCD clock per system pixel time in shifting dummy lines.
TGMODE1 TGMODE0
0 CTRLDIS
Note: It cannot be programmed to logic zero.
7 CNSET
CNSET
R/W
R/W
GL843 High Speed USB2.0 With ADF 2-in-1 Scanner Controller For 3x
DCKSEL1 DCKSEL0
R/W
R/W
0 Enable clock 1 and 2 under CCD TG position as illustrated.
1 Disable CCD CP & RS signals under CCD TG position as illustrated.
00 normal CCD TG type.
01 CCD TG control with dummy line.
10 CCD TG control with dummy lines for transparency scanning type.
11 reserved for ASIC simulation.
To set CCD TG plus width (in pixel time).
0 Select TG and clock to be non-Canon CIS style.
1 Select TG and clock to be Canon CIS style.
01 Speed 2: two CCD clock per system pixel time in shifting dummy lines.
10 Speed 3: three CCD clock per system pixel time in shifting dummy lines.
TGW5
R/W
R/W
CKTOGGLE
TGW4
R/W
R/W
CKDELAY1 CKDELAY0
TGW3
R/W
R/W
TGW2
R/W
R/W
CKSEL1
TGW1
R/W
R/W
CKSEL0
TGW0
Page 29
R/W
R/W