GL843 GENESYS [GENESYS LOGIC], GL843 Datasheet - Page 26

• Manufacturer Part Number: GL843
• Description: High Speed USB 2.0 With ADF 2-in-1 Scanner Controller
• Manufacturer: GENESYS [GENESYS LOGIC]

©2000-2006 Genesys Logic Inc. - All rights reserved.
Offset 0Bh …………………………………………..…………..……..………. Default value = 8’h00
Offset 0Ch …………………………………………..…………..……..………. Default value = 8’h00
Offset 0Dh
JAMPCMD DOCCMD CCDCMD
1-0 BAUDRAT[1:0] Set boud rate of RS232.
7-5 CLKSET[2:0]
2-0 DRAMSEL[2:0] Select the SDRAM size.
7-3 SWSH [4:0]
2-0 CCDLMT[2:0] To set the lines count which is synchronized for CCD timing(like NEC8884).
CLKSET2 CLKSET1 CLKSET0
4 RFHDIS
3 ENBDRAM
Command: Scanner command.
7 JAMPCMD
SWSH4
R/W
R/W
W
GL843 High Speed USB2.0 With ADF 2-in-1 Scanner Controller For 3x
SWSH3
R/W
R/W
W
1 Enable RS232 interface for special application and the specific GPIOs are
00 2400bps.
01 4800bps.
10 9600bps.
11 19200bps.
To select the system clock frequency.
000 24MHz.
001 30MHz.
010 40MHz.
011 48MHz.
100 60MHz.
101 Reserved.
110 Reserved.
111 Reserved.
0 Enable auto-refresh mode for SDRAM.
1 Enable self-refresh mode for SDRAM.
A rising edge from low to high: to start power on sequence of SDRAM.
000 Reserved.
001 16M bit.
010 64M bit.
011 128M bit.
100 256M bit.
101 512M bit.
110 Reserved.
111 Reserved.
To set the distance from SEL3 to TG for NEC8884. the width s
SWSH[4:2]*2
To control jamp when scanner is working on ADF.
defined to implement RS232 protocol.
SWSH2
R/W
R/W
W
TGSTIME
FULLSTP
RFHDIS
SWSH1
R/W
R/W
W
ENBDRAM DRAMSEL2 DRAMSEL1 DRAMSEL0
SWSH0
SEND
R/W
R/W
W
CCDLMT2 CCDLMT1 CCDLMT0
CLRMCNT
R/W
R/W
W
CLRDOCJM
R/W
R/W
W
CLRLNCNT
Page 26
R/W
R/W
W