PE3239EK PEREGRINE [Peregrine Semiconductor Corp.], PE3239EK Datasheet - Page 10

• Manufacturer Part Number: PE3239EK
• Description: 2.2 GHz Integer-N PLL for Low Phase Noise Applications
• Manufacturer: PEREGRINE [Peregrine Semiconductor Corp.]

Enhancement Register
The functions of the enhancement register bits are shown below with all bits active “high”.
Table 9. Enhancement Register Bit Functionality
Phase Detector
The phase detector is triggered by rising edges
from the main Counter (f
counter (f
and PD_D. If the divided VCO leads the divided
reference in phase or frequency (f
PD_D pulses “low”. If the divided reference leads
the divided VCO in phase or frequency (f
f
is directly proportional to phase offset between the
two input signals, f
The signals from the phase detector couple
directly to a charge pump. PD_U controls a
current source at pin CP with constant amplitude
and pulse duration approximately the same as
PD_U. PD_D similarly drives a current sink at pin
Figure 8. Typical PE3239 Loop Filter Application Example
©2006 Peregrine Semiconductor Corp. All rights reserved.
Page 10 of 12
p
** Program to 0
), PD_U pulses “low”. The width of either pulse
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit Function
MSEL output
Counter load
Power down
c
Reserved**
Reserved**
Reserved**
). It has two outputs, namely PD_U,
f
f
p
c
output
output
p
and f
Drives the M counter output onto the Dout output.
Power down of all functions except programming interface.
Immediate and continuous load of counter programming.
Drives the internal dual modulus prescaler modulus select (MSEL) onto the Dout output.
Drives the reference counter output onto the Dout output
p
c
) and the reference
.
Charge
Pump
p
leads f
c
c
leads
),
R
C1
Description
C2
CP. The current pulses from pin CP are low pass
filtered externally and then connected to the VCO
tune voltage. PD_U pulses result in a current
source, which increases the VCO frequency and
PD_D results in a current sink, which decreases
VCO frequency when using a positive Kv VCO.
A lock detect output, LD is also provided, via the
pin Cext. Cext is the logical “NAND” of PD_U and
PD_D waveforms, which is driven through a series
2 kohm resistor. Connecting Cext to an external
shunt capacitor provides low pass filtering of this
signal. Cext also drives the input of an internal
inverting comparator with an open drain output.
Thus LD is an “AND” function of PD_U and PD_D.
To VCO
Tune
Document No. 70-0047-02 │ UltraCMOS™ RFIC Solutions
Product Specification
PE3239