IC61LV5128 ICSI [Integrated Circuit Solution Inc], IC61LV5128 Datasheet - Page 8

• Manufacturer Part Number: IC61LV5128
• Description: 512K x 8 HIGH-SPEED CMOS STATIC RAM
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

IC61LV5128
WRITE CYCLE NO. 3
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
2. I/O will assume the High-Z state if OE > V
8
WRITE CYCLE NO. 2
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
ADDRESS
ADDRESS
D
D
OUT
OUT
WE
D
WE
D
OE
CE
OE
CE
IN
IN
LOW
LOW
LOW
t
SA
(WE Controlled, OE is LOW During Write Cycle)
(1,2)
t
DATA UNDEFINED
DATA UNDEFINED
SA
(WE Controlled, OE is HIGH During Write Cycle)
IH
.
VALID ADDRESS
t
t
t
t
AW
AW
HZWE
HZWE
VALID ADDRESS
t
t
PWE1
WC
t
t
PWE2
WC
HIGH-Z
HIGH-Z
t
t
SD
SD
DATA
DATA
IN
IN
VALID
VALID
t
t
HD
Integrated Circuit Solution, Inc.
HD
t
t
LZWE
LZWE
t
t
HA
HA
AHSR021-0A
09/11/2001