IC61LV5128 ICSI [Integrated Circuit Solution Inc], IC61LV5128 Datasheet - Page 7

• Manufacturer Part Number: IC61LV5128
• Description: 512K x 8 HIGH-SPEED CMOS STATIC RAM
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

IC61LV5128
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
AC WAVEFORMS
WRITE CYCLE NO. 1
Integrated Circuit Solution, Inc.
AHSR021-0A
Symbol
t
t
t
t
t
t
t
t
t
t
output loading specified in Figure 1a.
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the write.
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
(2)
(2)
ADDRESS
09/11/2001
Parameter
Write Cycle Time
CE to Write End
Address Setup Time
to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
D
OUT
WE
D
CE
IN
(1,2 )
DATA UNDEFINED
t
(CE Controlled, OE is HIGH or LOW)
SA
Min.
4.5
—
0
0
7
0
3
8
7
7
-8
Max.
—
—
—
—
—
—
—
—
—
4
t
HZWE
Min.
10
—
8
8
0
0
8
5
0
3
t
VALID ADDRESS
AW
-10
t
t
PWE1
PWE2
t
Max.
t
SCE
—
—
—
—
—
—
—
—
—
WC
5
(1,3)
HIGH-Z
(Over Operating Range)
Min.
t
12
—
9
9
0
0
9
6
0
3
SD
DATA
-12
Max.
IN
—
—
—
—
—
—
—
—
—
6
VALID
t
HD
Min.
t
15
10
10
10
—
0
0
7
0
3
LZWE
-15
t
HA
Max.
—
—
—
—
—
—
—
—
—
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7