IC62LV256L ICSI [Integrated Circuit Solution Inc], IC62LV256L Datasheet - Page 7

• Manufacturer Part Number: IC62LV256L
• Description: 32K x 8 Low Power SRAM with 3.3V
• Manufacturer: ICSI [Integrated Circuit Solution Inc]

AC WAVEFORMS
WRITE CYCLE NO. 1 (WE
IC62LV256L
Integrated Circuit Solution Inc.
ALSR008-0A 10/5/2001
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
4. Tested with OE HIGH.
Symbol
t
t
t
t
t
t
t
t
t
t
and output loading specified in Figure 1.
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
(4)
(2)
(2)
ADDRESS
Parameter
Write Cycle Time
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
D
OUT
WE
D
CE
IN
WE
WE
WE
WE Controlled)
t
DATA UNDEFINED
SA
(1,2)
t
AW
t
HZWE
Min.
15
10
10
10
—
t
0
0
8
0
0
SCE
-15 ns
t
WC
t
PWE
HIGH-Z
Max.
(1,3)
—
—
—
—
—
—
—
—
—
7
(Over Operating Range)
t
SD
DATA-IN VALID
Min.
20
13
15
13
10
—
0
0
0
0
-20 ns
t
HA
t
t
LZWE
HD
Max.
—
—
—
—
—
—
—
—
—
8
Min.
15
25
15
20
12
—
0
0
0
0
-25 ns
Max.
10
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7