YSS943 YAMAHA [YAMAHA CORPORATION], YSS943 Datasheet - Page 15

• Manufacturer Part Number: YSS943
• Description: ADAMB Advanced Digital Audio Multi channel decode processor
• Manufacturer: YAMAHA [YAMAHA CORPORATION]

YSS944/943/940
(3) Microprocessor interface connection example
(a) Microprocessor interface connection example 1 (single LSI)
When microprocessor interface pins are shared by several LSIs, the target LSI can be selected by either of the
following two methods.
• Design nMICS pins dedicated to specific LSIs.
• When nMICS pins are shared by several LSIs, use the ChipAdr register to select the target LSI.
These two examples are described below.
<1> A write operation to ChipAdr as the register access immediately after the falling edge of nMICS is
<2> A write operation to ChipAdr as the register access immediately after the falling edge of nMICS is
<3> ChipAdr can be read at any time.
<4> Registers cannot be accessed while accessing on-chip memory.
CAE
( Chip 0 )
nMICS
Internal signal
MISI
nMICS
( Chip 0 )
valid.
In the above figure, an example of writing when CAE = 0 and CA[3:0] = 4 is illustrated.
invalid.
In this case, the write operation (<2>) is disabled, so the write results from <1> are read.
IOPORT3 to IOPORT0 = X
nMICS
Chip 0
CA [ 3 : 0 ] = 0100
Write ChipAdr
CAE = 0
< 1 >
CA [3:0] = XXXX
Write ChipAdr
CAE = 1
< 2>
Default value after hardware reset is CAE = 0,
so there is no need to write to ChipAdr.
Read ChipAdr
CA [3: 0] = 0100
CAE = 0
< 3>
0
On -chip memory access
< 4 >
< 5 >
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