YSS943 YAMAHA [YAMAHA CORPORATION], YSS943 Datasheet - Page 12

• Manufacturer Part Number: YSS943
• Description: ADAMB Advanced Digital Audio Multi channel decode processor
• Manufacturer: YAMAHA [YAMAHA CORPORATION]

(1) Register access
12
Microprocessor Interface
External microprocessor or similar devices use this microprocessor interface (4-wire serial interface) to
perform the following tasks.
Registers are accessed in 16-bit units via the microprocessor interface. MISI is used to specify the register’s
address (7 bits: A6 to A0) and the read/write option (1 bit:R/W). During a write operation (R/W=L), data (8
bits: D7 to D0) is input to MISI and during a read operation (R/W=H) 8-bit data is output from the MISO pin.
The data to be written is stored in the register at the rising edge of MISCK during the last data bit (D7 in
figure).
The microprocessor interface’s sequence when accessing registers is shown below.
[Note]
• MISO is in output mode only when nMICS is at low level and during the data (8 bits) output timing.
• Registers can be accessed continuously while nMICS remains at low level.
• Certain register settings enable nMICS to be shared by multiple LSIs.
• Access to on-chip memory (firmware download) is performed by combining with control of writing to a
• Operation during a hardware reset (when nIC is at low level):
• Interruption of access:
• Access to registers
• Firmware download to on-chip memory
Otherwise, it is in high impedance (High-Z) mode and MISCK, MISI, and MISO can be shared for devices
that have a similar interface.
repeatedly set nMICS to high level.
register
During a hardware reset, the microprocessor interface does not function. Also, MISO is fixed at high
impedance (High-Z). When nIC is at low level, nMICS should be initialized to high level.
Access can be interrupted by setting nMICS to high level. The write operation prior to the 16th rising
edge of MISCK (MISI’s D7 data capture clock) described above becomes invalid. The MISO pin is set
to high impedance (High-Z).
nMICS
MISCK
MISI
MISO
MISI
MISO
Don't care
Don't care
A0
A0
A1
A1
A2
A2
High-Z
High-Z
A3
A3
A4
A4
A5
A5
A6 R/W D0
A6 R/W
D0
D1
D1
D2
D2
Don't care
D3
D3
YSS944/943/940
D4
D4
D5
D5
D6
D6
D7
D7
High-Z
Don't care
Don't care
There is no need to
During
write
operation
(R/W = L)
During
read
operation
(R/W = H)