K4D551638D SAMSUNG [Samsung semiconductor], K4D551638D Datasheet - Page 15

• Manufacturer Part Number: K4D551638D
• Description: 256Mbit GDDR SDRAM
• Manufacturer: SAMSUNG [Samsung semiconductor]

K4D551638D-TC
Note 1 :
- The previously used definition of tDV(=0.35tCK) artificially penalizes system timing budgets by assuming
- A new AC timing term, tQH which stands for data output hold time from DQS is difined to account for clock duty cycle
- tQHmin = tHP-X where
- The JEDEC DDR specification currently defines the output data valid window(tDV) as the time period when the data
variation and replaces tDV
. tHP=Minimum half clock period for any given cycle and is defined by clock high or clock low time(tCH,tCL)
. X=A frequency dependent timing allowance account for tDQSQmax
strobe and all data associated with that data strobe are coincidentally valid.
the worst case output vaild window even then the clock duty cycle applied to the device is better than 45/55%
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256M GDDR SDRAM
Rev 1.8 (Oct. 2003)