MN89303 PANASONIC [Panasonic Semiconductor], MN89303 Datasheet - Page 5

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MN89303

Manufacturer Part Number
MN89303
Description
SVGA Display Controller
Manufacturer
PANASONIC [Panasonic Semiconductor]
Datasheet
For Information Equipment
104 to 121 MD[15:0]
Pin No.
65 to 72
75 to 82
Pin Descriptions (continued)
102
103
31
83
84
85
63
64
62
61
LCAS
WE
BIOSEN
BACKON
LCDON
LOGICON
LP
FP
DISP
DCLK
UD[7:0]
LD[7:0]
Symbol
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
Level
TTL
Lower Column Address Strobe (LCAS)
This output is the strobe signal for the lower column address latch.
In the 2WE mode, however, it functions as the LWE signal.
Write Enable
This output is the data write signal. In the 2WE mode, however, it
functions as the UWE signal.
Memory Data
These pins represent the data bus to the DRAM.
BIOS Enable
This output enables ROM BIOS output.
Backlight ON
This output requests backlighting.
"L" level: OFF; "H" level: ON
LCD Drive ON
This output requests power-ON for the LCD panel.
"L" level: OFF; "H" level: ON
LCD Logic ON
This output requests power-ON for LCD panel logic circuits.
"L" level: OFF; "H" level: ON
Line Pulse
This output provides pulses indicating the end of a line of the
LCD panel.
Frame Pulse
This output provides pulses indicating the start of a frame of the
LCD panel.
Display Enable
This output enables the LCD display. An external RAMDAC uses
this signal as a blanking signal. A TFT LCD uses it as an enable
signal.
Data Shift Clock
This pin provides a data shift clock signal for an STN LCD panel.
It also outputs a dot clock signal on a TFT LCD panel or external
RAMDAC display mode.
Upper Data[7:0]
Lower Data[7:0]
This pins provide display data.
Usage varies with the LCD panel type.
Function Description
MN89303A

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